參數(shù)資料
型號(hào)： M37510M6
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 18/43頁
文件大?。?/td> 614K
代理商： M37510M6
18
7510 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Data bus
Receive buffer
Address 0018
16
0030
16
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Serial I/O control register
Receive shift register
Shift clock
Clock control circuit
Clock control circuit
Falling-edge detector
Serial I/O
synchronous clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 001C
16
0034
16
Shift clock
Transmit shift register
Transmit buffer register
Transmit interrupt source selection bit
Transmit shift completion flag (TSC)
Transmit interrupt request (TI)
Transmit buffer empty flag (TBE)
Address 0019
16
0031
16
Serial I/O status register
Address 0018
16
Data bus
F/F
P4
4
/R
X
D
1
P3
0
/R
X
D
2
P4
6
/S
CLK1
P3
2
/S
CLK2
f(X
IN
)
P4
7
/S
RDY1
P3
3
/S
RDY2
P4
5
/T
X
D
1
P3
1
/T
X
D
2
Contents in are for serial I/O2.
1/4
1/4
Address 001A
16
0032
16
BRG count source selection bit
0030
16
SERIAL I/O
The 7510 group has two built-in serial I/O channels (serial I/O1
and serial I/O2). Both serial I/O ports are functionally identical.
Serial I/O can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation.
Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
mode selection bit of the serial I/O control register (addresses
001A
16
and 0032
16
) to “1”.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB (addresses 0018
16
and
0030
16
).
Fig. 13 Block diagram of clock synchronous serial I/O
Fig. 14 Operation of clock synchronous serial I/O function
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
Internal clock
φ
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output T
X
D
Serial input R
X
D
Receive enable signal S
RDY
Write signal to
receive/transmit buffer
TBE = 0
TBE = 1
TSC = 0
RBF = 1
TSC = 1
Overrun error (OE) detection
The transmit interrupt (TI) can be selected to occur either when the transmit buffer has emptied (TBE = 1) or after the transmit shift
operation has ended (TSC = 1), by setting the transmit interrupt source selection bit (TIC) of the serial I/O control register.
If data is written to the transmit buffer when TSC = 0, the transmit clock is generated continuously and serial data is output continuously
from the T
X
D pin.
The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1”.
Notes 1 :
2 :
3 :
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