參數(shù)資料
型號(hào)： M37481MXT
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 22/97頁(yè)
文件大?。?/td> 1076K
代理商： M37481MXT
MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
22
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
I
Note
The timer value cannot be read in this mode. A timer value can be
set while a timer operation stops (not under pulse width measure-
ment).
Since the timer latch of this mode becomes read only, do not per-
form a write operation during measurement.
The timer is set to “FFFF
16
” only when a timer underflows or when
the active edge of pulse width measurement is detected.
Accordingly, the timer value at a start of measurement depends on
the timer value provided before the start of measurement.
Figure 22 shows a timing diagram in the pulse width measurement
mode.
(5) Programmable Waveform Generation Mode
G
Mode Selection
This mode is selected by setting b2, b1 and b0 of TXM or TYM
to “100”.
G
Count Source Selection
The count source is f(X
IN
)/2, f(X
IN
)/8 or f(X
IN
)/16.
G
Interrupt
The underflow interrupt is the same as the timer event count
mode. The INT
0
interrupt request bit (b0) or INT
1
interrupt re-
quest bit (b1) of IREQ2 is set to “1” by detecting an active edge
of the INT pin.
G
Explanation of Operation
This operation is the same as that of the timer event count
mode, except that a timer outputs the level of the value set in
the output level latch (b4) of TXM or TYM from the CNTR
0
/
CNTR
1
pin each time the timer underflows. After the timer
underflows, if the values of the output level latch and timer latch
are changed, the timer can output an optional waveform from
the CNTR
0
/CNTR
1
pin. In this mode, set the port in common
with the CNTR
0
/CNTR
1
pin as an output port.
In this mode, if the trigger selection bit of TXM or TYM is set to
“1” and the count stop control bit of TXYCON is set to “0” (count
operation), a timer can be started concurrently with the occur-
rence of a trigger (input signal of INT
0
/INT
1
pin).
A timer starting trigger is set in the INT
0
edge selection bit (b0)
or INT
1
edge selection bit (b1) of EG. At “0”, the falling edge is
active. At “1”, the rising edge is active. When the count stop
control bit is “1” (count status), a timer is not started at the oc-
currence of a trigger.
Figure 23 shows a timing diagram in the programmable wave-
form generation mode.
(6) Programmable One-Shot Output Mode
G
Mode Selection
This mode is selected by setting b2, b1 and b0 of TXM or TYM
to “101”.
G
Count Source Selection
The count source is f(X
IN
)/2, f(X
IN
)/8 or f(X
IN
)/16.
G
Interrupt
The underflow interrupt is the same as the timer event count
mode. One-shot output trigger is set in the INT
0
edge selection
bit (b0) or INT
1
edge selection bit (b1) of EG. At “0”, the falling
edge is active. At “1”, the rising edge is active. The INT
0
inter-
rupt request bit (b0) or INT
1
interrupt request bit (b1) of IREQ2
is set to “1” by detecting an active edge of the INT pin.
G
Explanation of Operation
In case of One-shot Output “H”
(b2, b3 of EG = “0”)
While a timer operation stops
The output level of the CNTR
0
/CNTR
1
pin is initialized to “L” at
mode selection. Set the one-shot width in TXH, TXL, TYH and
TYL. While a timer operation stops, a trigger (input signal of
INT
0
/INT
1
pin) cannot occur.
While a timer operation is enabled
At detecting a trigger, a timer outputs “H” from the CNTR
0
/
CNTR
1
pin, and outputs “L” at a timer underflow.
In Case of One-shot Output “L”
(b2, b3 of EG = “1”)
While a timer operation stops
The output level of the CNTR
0
/CNTR
1
pin is initialized to “H” at
mode selection. Set the one-shot width in TXH, TXL, TYH and
TYL. While a timer operation stops, a trigger (input signal of the
INT
0
/INT
1
pin) cannot occur.
While a timer operation is enabled
At the detection of a trigger, a timer outputs “L” from the CNTR
0
/
CNTR
1
pin and outputs “H” at a timer underflow.
In this mode, set the port in common with the CNTR
0
/CNTR
1
pin as an output port.
I
Note
G
Input a trigger width over 250 ns to the INT
0
/INT
1
pin.
G
If the value of the CNTR
0
edge selection bit or CNTR
1
edge se-
lection bit is changed while one-shot output is enabled or
one-shot output occurs, the output level from the CNTR
0
/
CNTR
1
pin changes.
Figure 24 shows a timing diagram in the programmable one-
shot output mode.
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