參數(shù)資料
型號(hào)： M37481E8T
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 58/97頁(yè)
文件大?。?/td> 1076K
代理商： M37481E8T
MITSUBISHI MICROCOMPUTERS
7480/7481 GROUP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
58
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Table 13. Recommended operating conditions (cont.)
Symbol
Parameter
Standard values
Min.
Typ.
Max.
Unit
1
2
250
500
1
2
2.2V
CC
– 2
8
f(CNTR)
f(S
CLK
)
f(X
IN
)
f(X
IN
) = 4 MHz
f(X
IN
) = 8 MHz
f(X
IN
) = 4 MHz
f(X
IN
) = 8 MHz
f(X
IN
) = 4 MHz
f(X
IN
) = 8 MHz
V
CC
= 2.7 to 4.5 V
V
CC
= 4.5 to 5.5 V
MHz
kHz
MHz
MHz
Timer input frequency CNTR
0
(P4
0
),
CNTR
1
(P4
1
) (Note 3)
Clock input oscillation frequency (Note 3)
Serial I/O clock input
frequency S
CLK
(P1
6
)
(Note 3)
Clock synchronous
serial I/O mode
UART mode
Notes 1 :
–40 to 85 °C for extended operating temperature range version.
2 :
The average output currents I
OH
(avg) and I
OL
(avg) are the average values during 100 ms.
3 :
The clock input oscillation frequency is at 50 % duty ratio.
4 :
When applying a voltage through a resistor as shown in the figure 55, V
I
> V
CC
may be accepted if the current is 1 mA or less.
Fig. 55 Notes on use of ports P4 and P5
Notes on Clamp Diode (7481 Group)
(1) Total input current
The current of ports P4 and P5 through the clamp diode can
be drawn up to 1.0 mA per port. When a current that cannot be
consumed by microcomputer is sent flow to the clamp diode,
this may raise the power source pin voltage of the microcom-
puter.
The system power circuit must be designed so that the power
source voltage of the microcomputer may be stabilized within
the standard values.
(2) Maximum input voltage
If the input voltage of a signal connected to ports P4 and P5 is
beyond V
CC
+ 0.3 V, the input waveform should have a delay
exceeding 2 μs/V from the moment that this waveform goes
over the voltage.
For using a CR circuit for delay, calculate a proper delay value
by the following expression:
where V
IN
= Maximum input voltage amplitude margin and
t = C
R.
dt
dv
=
≥
2
10
–6
(s/V)
t
0.6
V
IN
Port P4, P5
I
VI
The clamp diode of the 7480/7481 group is designed for a level
shift of DC signal unlike ordinary switching diodes. Do not apply
sudden stress, such as rush current, directly to the diode.
Notes on Countermeasures for Noise and
Latch-up (7481 Group)
(1) Connect a bypass capacitor (0.1μF) across the V
CC
pin and
the V
SS
pin with the shortest possible wiring, using a relatively
thick wire.
(2) Connect a bypass capacitor (0.01 μF) across the V
REF
pin and
the V
SS
pin with the shortest possible wiring, using a relatively
thick wire.
(3) In the oscillation circuit, connect across the X
IN
and X
OUT
pins
with the shortest possible wiring. Connect the GND and V
SS
pins of the oscillation circuit with the shortest possible wiring,
using a relatively thick wire.
(4) In the case of the P3
3
/V
PP
pin of the built-in programmable
ROM version, connect an approximately 5 k
resistor to the
P3
3
/V
PP
pin the shortest possible in series.
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