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7470/7471/7477/7478 GROUP USER’S MANUAL
3-10
APPENDIX
3.1 Control registers
Fig. 3.1.18 Structure of Timer 34 mode register
Fig. 3.1.17 Structure of Timer 12 mode register
b7 b6 b5 b4 b3 b2 b1 b0
Name
B
Function
0
1
2
Timer 12 mode register (T12M) [Address
Timer 12 mode register
3
4
5
6, 7
b7 b6
Timer 1 count stop
bit
At reset
R
0
W
Timer 1 count
source selection bit
Timer 1 internal clock
source selection bit
P12/T0 port output
selection bit
Timer 2 count stop
bit
Timer 2 count
source selection bit
Timer 2 internal clock
source selection bits
0 : Count start
1 : Count stop
0 : Internal clock
(Note 1)
1 : P32/CNTR0 external clock
0 : f(XIN)/16 or f(XCIN)/16
1 : f(XCIN)
(Note 2)
0 : P12 port output
1 : T0(Timer 1 overflow
divided by 2)
0 : Count start
1 : Count stop
0 : Internal clock (Note 1)
1 : Timer 1 overflow signal
0 0 :
f(XIN)/16 or f(XCIN)/16
0 1 :
f(XIN)/64 or f(XCIN)/64
1 0 :
f(XIN)/128 or f(XCIN)/128
1 1 :
f(XIN)/256 or f(XCIN)/256
(Note 3)
Notes 1:
2:
3:
In the 7470/7477 group, the internal clock is f(X
Since the 7470/7477 group is not provided the sub-clock
generating circuit, f(X
Since the 7470/7477 group is not provided the sub-clock
generating circuit, f(X
00F816]
IN
)/16.
CIN
) cannot be used. Fix this bit to “0.”
CIN
) cannot be used.
b7 b6 b5 b4 b3 b2 b1 b0
Name
B
Function
0
At reset
R
0
Timer 34 mode register (T34M) [Address
Timer 34 mode register
3
0
Timer 3 count stop
bit
W
Timer 3 count
source selection bits
Timer 4 count stop
bit
Timer 4 count
source selection bits
Timer 4 pulse width
measurement mode
selection bit
0 : Count start
1 : Count stop
0 : Count start
1 : Count stop
Notes 1:
2:
When Timer 1 overflow is selected as a Timer 2
count source, the Timer 4 count source is the Timer 1
overflow regardless of the value of bit 6 of the
Timer mode register 2.
Since the 7470/7477 group is not provided the sub-clock
generating circuit, f(X CIN) cannot be used.
1, 2
b2 b1
0 0 :
f(XIN)/16 or f(XCIN)/16
0 1 :
f(XCIN)
1 0 :
Timer 1 overflow or
Timer 2 overflow
1 1 :
P33/CNTR1 external
clock
(Note 2)
b4 b3
0 0 :
Timer 3 overflow
0 1 :
f(XIN)/16 or f(XCIN)/16
1 0 :
Timer 1 overflow or
Timer 2 overflow
1 1 :
P33/CNTR1 external
clock
(Notes 1, 2)
0 : Timer mode
1 : External pulse width
measurement mode
6
0
P13/T1 port output
selection bit
0 : P13 port
1 : T1(Timer 4 overflow divided
by 2 or PWM output)
7
4, 5
00F916]