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參數(shù)資料
| 型號(hào)： | M37477M8-XXXSP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| 封裝： | 0.400 INCH, 1.78 MM PITCH, PLASTIC, SDIP-32 |
| 文件頁(yè)數(shù)： | 47/354頁(yè) |
| 文件大?。?/td> | 4508K |
| 代理商： | M37477M8-XXXSP |
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1-123
7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.13 Serial I/O
2
2 Receive operation of UART
The receive operation of UART is described below.
q Start of receive operation
Set the receive enable bit (bit 5) of the Serial I/O control register (SIOCON) to the enable state
(“1”) in the receive enable state.V1 With this operation, the start bit is detected and serial data is
received.
q Receive operation
1 After a fall of the P14/RxD pin is detected, the level of the P14/RxD pin is checked after one-
half a cycle of the synchronous clock. If its level is “L,” the bit is judged as a start bit. When
its level is “H,” it is judged that noise is generated, so that the the receive operation is stopped
and the UART waits for the start bit.
2 Receive data is input bit by bit from the P14/RxD pin to the Receive shift register in synchronization
with the rise of the synchronous clock.
3 Data, immediately after the start bit, is input starting with the most significant bit of the Receive
shift register. Each time one bit is received, the contents of the Receive shift register are shifted
by 1 bit in the direction of the least significant bit.
4 When the specified number of bits are all input in the Receive shift register, the contents of the
Receive shift register are transferred to the Receive buffer register (RB).V2,V3
5 After 1/2 cycle of the shift clock after a start of stop bit reception, the receive buffer full flag
(bit 1) of the Serial I/O status register (SIOSTS) is set to “1”V4 and a receive interrupt request
is generated.
6 Error flag detection is started concurrently with the occurrence of the receive interrupt request.
V1: Status in which the register for receive operation has been completed. Refer to the “[UART
receive setting method]” which will be described later.
V2: When the data bit length is 7 bits, the contents of the Receive buffer register consist of receive
data of bits 0 to 6 and “0” of bit 7 (MSB).
V3: If receive data is further input to the Receive shift register when data remains (when the
receive buffer full flag is “1”) without reading out the contents of the Receive buffer register, the
overrun error flag of the Serial I/O status register is set to “1.” At this time, the data of the
Receive shift register is not transferred to the Receive buffer register and the original data of
the Receive buffer register is held.
V4: The receive buffer full flag is cleared to “0” by reading out the Receive buffer register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M37471M2-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| M37478M2-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP56 |
| M37477M2-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32 |
| M37478M2-XXXSP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP42 |
| M37477M2-XXXFP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37477M8-XXXSP/FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37478E8FP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37478E8SP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37478E8SP/FP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37478E8SS | 制造商:Renesas Electronics Corporation 功能描述:MCU 8BIT 740 CISC 16KB PROM 5V 42PIN SDIP - Bulk |
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