HARDWARE
1.11 Interrupts
7470/7471/7477/7478 GROUP USER’S MANUAL
1-48
1.11 Interrupts
Interrupts are used in the following cases.
q When it is requested to execute higher-priority processing than the processing routine being executed.
q When it is necessary to observe any timing for processing.
The 7470/7471 group can generate interrupts from 12 sources and the 7477/7478 group can generate
interrupts from 13 sources.
1.11.1 Description of interrupt source
2
2 Priority of interrupt
The interrupts are vector interrupts with a fixed priority sequence.
When two or more interrupt
requests occur at the same sampling time, they are accepted starting with the highest-priority interrupt.
This priority is determined by hardware. However, a variety of priority processing can be executed
by software when the interrupt control flags (interrupt enable bit and interrupt disable flag) are used.
2
2 Acceptance of interrupt
The corresponding interrupt request bit is set to “1” upon occurrence of an interrupt. When the
following conditions are satisfied in this state, this interrupt is accepted.
For the details, refer to “1.11.3 Interrupt control.”
1 When the interrupt disable flag is cleared to “0” (interrupt enable state)
2 When the interrupt enable bit is set to “1” (interrupt enable state)
Table 1.11.1 shows an interrupt priority, interrupt sources and vector addresses.
Table 1.11.1 Interrupt sources and priority
Interrupt source
High
FFFF16
FFFD16
FFFB16
FFF916
FFF716
FFF516
FFF316
FFF116
FFEF16
FFED16
FFEB16
FFE916
1
2
3
4
5
6
7
8
9
10
11
12
Non-maskable
Polarity programmable
INT1: polarity programmable
Polarity programmable
BRK instruction interrupt is non-
maskable software interrupt
Lower
FFFE16
FFFC16
FFFA16
FFF816
FFF616
FFF416
FFF216
FFF016
FFEE16
FFEC16
FFEA16
FFE816
Remark
Reset (Note)
INT0 interrupt
INT1 interrupt or key-on wake up interrupt
CNTR0 interrupt or CNTR1 interrupt
Timer 1 interrupt
Timer 2 interrupt
Timer 3 interrupt
Timer 4 interrupt
Priority
Serial I/O interrupt
A-D conversion completion interrupt
BRK instruction interrupt
7470/7471 group
7477/7478 group
Vector address
Note: A reset operation is performed in the same way as an interrupt, so it is described in the table.
Serial I/O receive interrupt
Serial I/O transmit interrupt
A-D conversion
completion interrupt
BRK instruction interrupt