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參數(shù)資料
| 型號： | M37272M8-183SP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER |
| 中文描述： | 單芯片8位CMOS微機隱蔽字幕解碼器和屏幕顯示控制器 |
| 文件頁數(shù)： | 41/131頁 |
| 文件大?。?/td> | 1297K |
| 代理商： | M37272M8-183SP |
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41
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
and ON-SCREEN DISPLAY CONTROLLER
M37272M6H/M8H/MAH/MFH
–
XXXSP/FP
M37272E8SP/FP, M37272EFSP/FP
MITSUBISHI MICROCOMPUTERS
Rev 1.0
(3) RESTART condition generating procedure
Procedure example (The necessary conditions of the generating
procedure are described as the following
to
.)
Execute the following procedure when the PIN bit is “0.”
LDM
LDA
SEI
STA
LDM
CLI
#$00, S1
—
(Select slave receive mode)
(Taking out of slave address value)
(Interrupt disabled)
(Writing of slave address value)
(Trigger of RESTART condition generating)
(Interrupt enabled)
S0
#$F0, S1
Select the slave receive mode when the PIN bit is “0.” Do not write
“1” to the PIN bit. Neither “0” nor “1” is specified for the writing to
the BB bit.
The TRX bit becomes “0” and the SDA pin is released.
The SCL pin is released by writing the slave address value to the
I
2
C data shift register. Use “STA,” “STX” or “STY” of the zero page
addressing instruction for writing.
Use “LDM” instruction for setting trigger of RESTART condition gen-
erating.
Write the slave address value of above
and set trigger of RE-
START condition generating of above
continuously shown the
above procedure example.
Disable interrupts during the following two process steps:
Writing of slave address value
Trigger of RESTART condition generating
(4) STOP condition generating procedure
Procedure example (The necessary conditions of the generating
procedure are described as the following
to
.)
SEI
LDM #$C0, S1
NOP
LDM #$D0, S1
CLI
(Interrupt disabled)
(Select master transmit mode)
(Set NOP)
(Trigger of STOP condition generating)
(Interrupt enabled)
Write “0” to the PIN bit when master transmit mode is select.
Execute “NOP” instruction after setting of master transmit mode.
Also, set trigger of STOP condition generating within 10 cycles af-
ter selecting of master trasmit mode.
Disable interrupts during the following two process steps:
Select of master transmit mode
Trigger of STOP condition generating
(5) Writing to I
2
C status register
Do not execute an instruction to set the PIN bit to “1” from “0” and an
instruction to set the MST and TRX bits to “0” from “1” simultaneously.
It is because it may enter the state that the SCL pin is released and
the SDA pin is released after about one machine cycle. Do not ex-
ecute an instruction to set the MST and TRX bits to “0” from “1” si-
multaneously when the PIN bit is “1.” It is because it may become the
same as above.
(6) Process of after STOP condition generating
Do not write data in the I
2
C data shift register S0 and the I
2
C status
register S1 until the bus busy flag BB becomes “0” after generating
the STOP condition in the master mode. It is because the STOP
condition waveform might not be normally generated. Reading to the
above registers do not have the problem.
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