- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377825 > M36W0R6030B0ZAQ (意法半導(dǎo)體) 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package PDF資料下載
參數(shù)資料
| 型號(hào)： | M36W0R6030B0ZAQ |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| 中文描述： | 64兆位（4Mb的x16插槽，多銀行，突發(fā)）閃存和8兆位（512KB的× 16）的SRAM，多芯片封裝 |
| 文件頁數(shù)： | 17/26頁 |
| 文件大小： | 168K |
| 代理商： | M36W0R6030B0ZAQ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁
17/26
M36W0R6030T0, M36W0R6030B0
Table 9. Read AC Characteristics
Note: 1. Sampled only. Not 100% tested.
2. Whatever the temperature and voltage, t
E1HDZ
and t
E2LDZ
are less than t
E1LDX
and t
E2HDX
; t
BHDZ
is less than t
BLDX
and, t
GHDZ
is
less than t
GHDX
.
Symbol
Alt
Parameter
M36W0R6030T0, M36W0R6030B0
Unit
Min
Max
t
AVAV
t
E1LE1H
t
E2HE2L
t
RC
Read Cycle Time
70
ns
t
AVQV
t
AA
Address Valid to Output Valid
70
ns
t
AVQX
t
OHA
Address Transition to Output Transition
10
ns
t
BHQZ(2)
t
HZBE
Byte Enable High to Data Hi-Z
25
ns
t
BLQV
t
DBE
Byte Enable Low to Data Valid
70
ns
t
BLQX(2)
t
LZBE
Byte Enable Low to Data Transition
5
ns
t
E1HQZ
t
E2LQZ
t
HZCE
Chip Enable 1 High or Chip Enable 2 Low to Data
Hi-Z
25
ns
t
E1LQV
t
E2HQV
t
ACE
Chip Enable 1 Low or Chip Enable 2 High to Data
Valid
70
ns
t
E1LQX
t
E2HQX
t
LZCE
Chip Enable 1 Low or Chip Enable 2 High to Data
Transition
10
ns
t
GHQZ
t
HZOE
Output Enable High to Data Hi-Z
25
ns
t
GLQV
t
DOE
Output Enable Low to Data Valid
35
ns
t
GLQX
t
LZOE
Output Enable Low to Data Transition
5
ns
t
PD(1)
Chip Enable 1 High or Chip Enable 2 Low to
Power Down
70
ns
t
PU(1)
Chip Enable 1 Low or Chip Enable 2 High to
Power Up
0
ns
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M36W0R6030B0ZAQE | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030B0ZAQF | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030B0ZAQT | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030T0 | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030T0ZAQ | 64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M36W0R6030B0ZAQE | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030B0ZAQF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030B0ZAQT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030T0 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (4Mb x16, Multiple Bank, Burst) Flash Memory and 8 Mbit (512Kb x16) SRAM, Multi-Chip Package |
| M36W0R6030T0ZAQ | 制造商:Micron Technology Inc 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。