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參數(shù)資料
| 型號(hào)： | M366S3323DTS-L7A |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx64 SDRAM DIMM based on 16Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| 中文描述： | 32Mx64 SDRAM的內(nèi)存在16Mx8，4Banks，4K的刷新，3.3社民黨基于同步DRAM |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大?。?/td> | 124K |
| 代理商： | M366S3323DTS-L7A |
M366S3323DTS
PC133/PC100 Unbuffered DIMM
Rev. 0.1 Sept. 2001
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Unless otherwise noted, input swing level is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ
)
Notes :
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
Version
Unit
Note
- 7C
-7A
-1H
-1L
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
O
= 0 mA
1040
960
960
960
mA
1
Precharge standby current
in power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 10ns
32
mA
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
32
Precharge standby current
in non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
320
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
160
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 10ns
80
mA
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
80
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
480
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
400
mA
Operating current
(Burst mode)
I
CC4
I
O
= 0 mA
Page burst
4Banks activated
t
CCD
= 2CLKs
1120
1120
1040
1040
mA
1
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
2000
1840
1760
1760
mA
2
Self refresh current
I
CC6
CKE
≤
0.2V
C
32
mA
L
12.8
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