參數(shù)資料
型號: M34D64WMNT1
廠商: 意法半導(dǎo)體
元件分類: EEPROM
英文描述: 64/32 Kbit Serial IC Bus EEPROM With Hardware Write Control on Top Quarter of Memory
中文描述: 64/32千位串行IC總線EEPROM,帶有硬件寫控制記憶的熱門季
文件頁數(shù): 6/15頁
文件大?。?/td> 119K
代理商: M34D64WMNT1
M34D64, M34D32
6/15
Figure 6. Write Mode Sequences
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
DATA IN 2
AI02853
PAGE WRITE
(cont'd)
S
DATA IN N
ACK
R/W
ACK
ACK
ACK
ACK
ACK
ACK
ACK
R/W
ACK
ACK
contents of the addressed memory location are
not modified. After each byte is transferred, the
internal byte address counter (the 5 least
significant bits only) is incremented. The transfer is
terminated by the master generating a STOP
condition.
When the master generates a STOP condition
immediately after the Ack bit (in the “10
th
bit” time
slot), either at the end of a byte write or a page
write, the internal memory write cycle is triggered.
A STOP condition at any other time does not
trigger the internal write cycle.
During the internal write cycle, the SDA input is
disabled internally, and the device does not
respond to any requests.
Minimizing System Delays by Polling On ACK
During the internal write cycle, the memory
disconnects itself from the bus, and copies the
data from its internal latches to the memory cells.
The maximum write time (t
w
) is shown in Table 9,
but the typical time is shorter. To make use of this,
Byte Write
In the Byte Write mode, after the Device Select
Code and the address bytes, the master sends
one data byte. If the addressed location is write
protected by the WC pin, the location is not
modified. The master terminates the transfer by
generating a STOP condition.
Page Write
The Page Write mode allows up to 32 bytes to be
written in a single write cycle, provided that they
are all located in the same “row” in the memory:
that is the most significant memory address bits
(b12-b5 for the M34D64 and b11-b5 for the
M34D32) are the same. If more bytes are sent
than will fit up to the end of the row, a condition
known as ‘roll-over’ occurs. Data starts to become
overwritten (in a way not formally specified in this
data sheet).
The master sends from one up to 32 bytes of data,
each of which is acknowledged by the memory if
the WC pin is low. If the WC pin is high, the
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