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參數(shù)資料
| 型號： | M34C02 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 2 Kbit Serial IC Bus EEPROM For DIMM Serial Presence Detect |
| 中文描述： | 2千位串行IC總線的EEPROM內(nèi)存串行存在檢測 |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 147K |
| 代理商： | M34C02 |
M34C02
4/19
Start Condition
START is identified by a high to low transition of
the SDA line while the clock, SCL, is stable in the
high state. A START condition must precede any
data transfer command. The memory device
continuously
monitors
programming cycle) the SDA and SCL lines for a
START condition, and will not respond unless one
is given.
(except
during
a
Stop Condition
STOP is identified by a low to high transition of the
SDA line while the clock SCL is stable in the high
state.
A
STOP
communication between the memory device and
the bus master. A STOP condition at the end of a
Read command, provided that it is followed by a
NoAck, forces the memory device into its standby
state. A STOP condition at the end of a Write
condition
terminates
Figure 4. I
2
C Bus Protocol
SCL
SDA
SCL
SDA
SDA
START
CONDITION
SDA
INPUT
SDA
CHANGE
AI00792
STOP
CONDITION
1
2
3
7
8
9
MSB
ACK
START
CONDITION
SCL
1
2
3
7
8
9
MSB
ACK
STOP
CONDITION
Table 3. Device Select Code
1
Note: 1. The most significant bit (b7) is sent first.
Device Type Identifier
Chip Enable
RW
b7
b6
b5
b4
b3
b2
b1
b0
Memory Area Select Code (two arrays)
1
0
1
0
E2
E1
E0
RW
Protection Register Select Code
0
1
1
0
E2
E1
E0
RW
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