參數(shù)資料
型號： M34584EDFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-42
文件頁數(shù)： 120/159頁
文件大?。?/td> 1166K
代理商： M34584EDFP
Rev.3.00
2004.08.06
page 61 of 155
REJ03B0010-0300Z
4584 Group
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Table 18 Key-on wakeup control register, pull-up control register
K03
K02
K01
K00
Key-on wakeup control register K0
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Key-on wakeup not used
Key-on wakeup used
Pins P12 and P13 key-on wakeup
control bit
Pins P10 and P11 key-on wakeup
control bit
Pins P02 and P03 key-on wakeup
control bit
Pins P00 and P01 key-on wakeup
control bit
at reset : 00002
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
TAK0/TK0A
Note: “R” represents read enabled, and “W” represents write enabled.
K13
K12
K11
K10
Key-on wakeup control register K1
Return by level
Return by edge
Falling waveform/“L” level
Rising waveform/“H” level
Return by level
Return by edge
Falling waveform/“L” level
Rising waveform/“H” level
Ports P02 and P03 return condition selection
bit
Ports P02 and P03 valid waveform/
level selection bit
Ports P01 and P00 return condition selection
bit
Ports P01 and P00 valid waveform/
level selection bit
at reset : 00002
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
TAK1/TK1A
K23
K22
K21
K20
Key-on wakeup control register K2
Return by level
Return by edge
Key-on wakeup not used
Key-on wakeup used
Return by level
Return by edge
Key-on wakeup not used
Key-on wakeup used
INT1 pin return condition selection bit
INT1 pin key-on wakeup contro bit
INT0 pin return condition selection bit
INT0 pin key-on wakeup contro bit
at reset : 00002
at RAM back-up : state retained
0
1
0
1
0
1
0
1
R/W
TAK2/TK2A
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