參數(shù)資料
型號： M34570M8-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, MICROCONTROLLER, PDSO36
封裝： 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù)： 28/32頁
文件大?。?/td> 319K
代理商： M34570M8-XXXFP
5
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MULTIFUNCTION
Pin
D9
P21
Multifunction
TOUT
INT
Multifunction
D9
P21
Pin
TOUT
INT
Notes 1: Pins except above have just single function.
2: The port D9 is the output port and port P21 is the input port.
CONNECTIONS OF UNUSED PINS
Connection
Connect to VSS, or set the output latch to
“0” and open.
Set the output latch to “1” and open.
Connect to VSS (Note 1).
Connection
Connect to VSS, or set the output latch to
“0” and open.
Connect to VSS (Note 2) or open (Note 3).
Open.
Pin
P30–P33
P40–P43
CARR
Pin
D0–D8
D9/TOUT
P00–P03
P10–P13
P20, P21/INT
Notes 1: When the P21/INT pin is connected to VSS pin, set the return level to “H” level by software (interrupt control register I12=“1”).
When the P21/INT pin is connected to VSS pin while the return level is set to “L” level, system returns from RAM back-up
state immediately after system enters the RAM back-up state.
2: In order to connect ports P40–P43 to VSS, turn off their pull-up transistors (pull-up control register PU0i=“0”) by software and
also invalidate the key-on wakeup functions (key-on wakeup control register K0i=“0”). When these pins are connected to
VSS while the key-on wakeup functions are left valid, the system fails to return from RAM back-up state. In order to make
these pins open, turn on their pull-up transistors (register PU0i=“1”) by software (i = 0, 1, 2, 3).
Be sure to select the key-on wakeup function and the pull-up function with every one port.
3: In order to make ports P40–P43 open, turn on their pull-up transistors (register PU0i = “1”) by software (i = 0, 1, 2, 3).
(Note in order to set the output latch to “0” or “1” or make pins open)
After system is released from reset, a port is in a high-impedance state until the output latch of the port is set to “0” by software.
Accordingly, the voltage level of pins is undefined and the excess of the supply current may occur.
To set the output latch periodically is recommended because the value of output latch may change by noise or a program run away
(caused by noise).
(Note in order to connect unused pins to VSS)
To avoid noise, connect the unused pins to VSS at the shortest distance using a thick wire.
PORT FUNCTION
Port
Port D
Port P0
Port P1
Port P2
Port P3
Port P4
Control
bits
1
4
2
4
Control
instructions
SD
RD
CLD
OP0A
IAP0
OP1A
IAP1
IAP2
SNZI0
(Note)
OP3A
IAP3
IAP4
Control
registers
W22
PU0
K0
Output structure
N-channel open-drain
Remark
Pull-up functions
Key-on wakeup functions
Pull-up functions
Key-on wakeup functions
Key-on wakeup function
Pull-up functions
(programmable)
Key-on wakeup functions
(programmable)
W22 controls the switch of D9/
TOUT pin
Note: Level of the P21/INT pin can be examined with the SNZI0 instruction.
Pin
D0–D8, D9/TOUT
P00–P03
P10–P13
P20
P21/INT
P30–P33
P40–P43
Input/
Output
(10)
I/O
(4)
I/O
(4)
Input
(2)
I/O
Input
(4)
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