51
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Skip condition
Detailed description
C
50
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Function
Mnemonic
D
9
D
8
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Hexadecimal
notation
Type of
instructions
Parameter
N
w
N
c
Instruction code
–
–
(EXF0) = 1
(INT) = “H”
However, I1
2
= 1
(INT) = “L”
However, I1
2
= 0
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Clears the interrupt enable flag INTE to “0,” and disables the interrupt.
Sets the interrupt enable flag INTE to “1,” and enables the interrupt.
Skips the next instruction when the contents of EXF0 flag is “1.”
After skipping, clears the EXF0 flag to “0.”
When bit 2 (I1
2
) of register I1 is “1” : Skips the next instruction when the level of INT pin is “H.”
When bit 2 (I1
2
) of register I1 is “0” : Skips the next instruction when the level of INT pin is “L.”
Transfers the contents of interrupt control register V1 to register A.
Transfers the contents of register A to interrupt control register V1.
Transfers the contents of interrupt control register V2 to register A.
Transfers the contents of register A to interrupt control register V2.
Transfers the contents of interrupt control register I1 to register A.
Transfers the contents of register A to interrupt control register I1.
Transfers
the contents of timer control register W1 to register A.
Transfers the contents of register A to timer control register W1.
Transfers the contents of timer control register W2 to register A.
Transfers the contents of register A to timer control register W2.
Transfers the contents of timer control register W3 to register A.
Transfers the contents of register A to timer control register W3.
Transfers the contents of timer count value store register W5 to the low-order 2 bits of register A. The
contents of the high-order 2 bits of register A is set to “0.”
Transfers the contents of the low-order 2 bits of register A to timer count value store register W5.
I
MACHINE INSTRUCTIONS (CONTINUED)
DI
EI
SNZ0
SNZI0
TAV1
TV1A
TAV2
TV2A
TAI1
TI1A
TAW1
TW1A
TAW2
TW2A
TAW3
TW3A
TAW5
TW5A
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
0
1
0
0
0
0
1
1
1
0
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
1
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
1
1
0
1
0
0
1
0
1
0
0
1
1
1
0
0
0
0
1
0
1
1
1
1
0
0
1
0
0
1
0
1
1
1
0
0
0
0
0
1
1
1
0
1
0
0
1
0
0
1
1
0
0
1
0
0
0
0
0
1
1
1
1
1
0
0
1
0
0
1
1
0
1
1
0
0
0
0
1
0
0
0
0
1
0
0
1
0
0
1
1
1
1
1
0
0
0
0
1
0
0
1
0
0
0
4
0
0
5
0
3
8
0
3
A
0 5 4
0 3 F
0 5 5
0 3 E
2 5 3
2 1 7
2 4 B
2 0 E
2 4 C
2 0 F
2 4 D
2 1 0
2 4 F
2 1 2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
(INTE)
←
0
(INTE)
←
1
(EXF0) = 1
After skipping the next instruction,
(EXF0)
←
0
I1
2
= 1 : (INT) = “H”
I1
2
= 0 : (INT) = “L”
(A)
←
(V1)
(V1)
←
(A)
(A)
←
(V2)
(V2)
←
(A)
(A)
←
(I1)
(I1)
←
(A)
(A)
←
(W1)
(W1)
←
(A)
(A)
←
(W2)
(W2)
←
(A)
(A)
←
(W3)
(W3)
←
(A)
(A)
←
(0, 0, W5
1
, W5
0
)
(W5
1
, W5
0
)
←
(A
1
, A
0
)
T