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  • 參數(shù)資料
    型號: M34554MC-XXXFP
    元件分類: 微控制器/微處理器
    英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64
    封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
    文件頁數(shù): 89/138頁
    文件大小: 1082K
    代理商: M34554MC-XXXFP
    Rev.3.00
    Aug 06, 2004
    page 54 of 136
    REJ03B0043-0300Z
    4554 Group
    VOLTAGE DROP DETECTION CIRCUIT
    The built-in voltage drop detection circuit is designed to detect a
    drop in voltage and to reset the microcomputer if the supply voltage
    drops below a set value.
    Fig. 41 Voltage drop detection reset circuit
    Fig. 42 Voltage drop detection circuit operation waveform
    Table 14 Voltage drop detection circuit operation state
    VDCE pin
    “L”
    “H”
    At CPU operating
    Invalid
    Valid
    At power down
    (SVDE instruction is not executed)
    Invalid
    At power down
    (SVDE instruction is executed)
    Invalid
    Valid
    EPOF instruction +POF instruction
    EPOF instruction +POF2 instruction
    Q
    S
    R
    SVDE instruction
    Internal reset signal
    Voltage drop detection circuit
    Reset signal
    VRST
    Voltage drop detection circuit
    VDCE
    Internal reset signal
    T5F flag
    Key-on wakeup signal
    Q
    S
    R
    +
    VDD
    Voltage drop detection circuit
    Reset signal
    Microcomupter starts operation after
    on-chip oscillator (internal oscillator)
    clock is counted 5400 to 5424 times.
    VRST (detection
    voltage)
    RESET pin
    Note: Detection voltage of voltage drop detection circuit does not have hysteresis.
    (2) Note on voltage drop detection circuit
    The voltage drop detection circuit detection voltage of this prod-
    uct is set up lower than the minimum value of the supply voltage
    of the recommended operating conditions.
    When the supply voltage of a microcomputer falls below to the
    minimum value of recommended operating conditions and re-
    goes up (ex. battery exchange of an application product),
    depending on the capacity value of the bypass capacitor added
    to the power supply pin, the following case may cause program
    failure (Figure 43);
    supply voltage does not fall below to VRST, and
    its voltage re-goes up with no reset.
    In such a case, please design a system which supply voltage is
    once reduced below to VRST and re-goes up after that.
    Fig. 43 VDD and VRST
    VDD
    Recommended
    operatng condition
    min.value
    No reset
    Program failure may occur.
    VRST
    VDD
    Recommended
    operatng condition
    min.value
    VRST
    → Normal operation
    Reset
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