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6
4519 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
DEFINITION OF CLOCK AND CYCLE
q Operation source clock
The operation source clock is the source clock to operate this
product. In this product, the following clocks are used.
Clock (f(XIN)) by the external ceramic resonator
Clock (f(XIN)) by the external RC oscillation
Clock (f(XIN)) by the external input
Clock (f(RING)) of the ring oscillator which is the internal oscil-
lator
Clock (f(XIN)) by the external quartz-crystal oscillation
Register MR
System clock
f(STCK) = f(XIN)
f(STCK) = f(RING)
f(STCK) = f(XIN)/2
f(STCK) = f(RING)/2
f(STCK) = f(XIN)/4
f(STCK) = f(RING)/4
f(STCK) = f(XIN)/8
f(STCK) = f(RING)/8
Table Selection of system clock
: 0 or 1
Note: The f(RING)/8 is selected after system is released from reset.
When ring oscillator clock is selected for main clock, set the
ring oscillator to be operating state.
MR2
0
1
0
1
MR3
0
1
Operation mode
XIN through mode
Ring through mode
XIN divided by 2 mode
Ring divided by 2 mode
XIN divided by 4 mode
Ring divided by 4 mode
XIN divided by 8 mode
Ring divided by 8 mode
q System clock (STCK)
The system clock is the basic clock for controlling this product.
The system clock is selected by the clock control register MR
shown as the table below.
q Instruction clock (INSTCK)
The instruction clock is the basic clock for controlling CPU. The
instruction clock (INSTCK) is a signal derived by dividing the
system clock (STCK) by 3. The one instruction clock cycle gen-
erates the one machine cycle.
q Machine cycle
The machine cycle is the standard cycle required to execute the
instruction.
MR0
0
1
0
1
0
1
0
1
MR1
0
0
0
0
Notes 1: Pins except above have just single function.
2: The input/output of P30 and P31 can be used even when INT0 and INT1 are selected.
3: The input of ports P20–P22 can be used even when SIN, SOUT and SCK are selected.
4: The input/output of D6 can be used even when CNTR0 (input) is selected.
5: The input of D6 can be used even when CNTR0 (output) is selected.
6: The input/output of D7 can be used even when CNTR1 (input) is selected.
7: The input of D7 can be used even when CNTR1 (output) is selected.
Pin
D6
D7
P20
P21
P22
P30
P31
Multifunction
CNTR0
CNTR1
SCK
SOUT
SIN
INT0
INT1
MULTIFUNCTION
Pin
CNTR0
CNTR1
SCK
SOUT
SIN
INT0
INT1
Multifunction
D6
D7
P20
P21
P22
P30
P31
Pin
P60
P61
P62
P63
P40
P41
P42
P43
Multifunction
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Pin
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
Multifunction
P60
P61
P62
P63
P40
P41
P42
P43