參數(shù)資料
型號: M34502M2-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, MICROCONTROLLER, PDSO24
封裝: 5.30 X 10.10 MM, 0.80 MM PITCH, PLASTIC, SSOP-24
文件頁數(shù): 42/116頁
文件大小: 896K
代理商: M34502M2-XXXFP
4502 Group
Rev.3.01
2005.02.02
page 31 of 112
REJ03B0105-0301
A/D CONVERTER
The 4502 Group has a built-in A/D conversion circuit that performs
conversion by 10-bit successive comparison method. Table 11
shows the characteristics of this A/D converter. This A/D converter
can also be used as an 8-bit comparator to compare analog volt-
ages input from the analog input pin with preset values.
Table 11 A/D converter characteristics
Characteristics
Successive comparison method
10 bits
Linearity error: ±2LSB
Differential non-linearity error: ±0.9LSB
46.5
s (High-speed mode at 4.0 MHz
oscillation frequency)
4
Parameter
Conversion format
Resolution
Relative accuracy
Conversion speed
Analog input pin
Fig. 28 A/D conversion circuit structure
VSS
VDD
DAC
DA converter
TABAD
1/6
Q13
Q11 Q10
Q12
TADAB
0
1
4
8
01
1
8
10
Q13
0
1
Q13
8
(Note 1)
8
2
TALA
Q13
TAQ1
TQ1A
ADF
(1)
P20/AIN0
2
1
0
10
P21/AIN1
P30/AIN2
P31/AIN3
IAP3
(P30, P31)
OP3A
(P30, P31)
IAP2
(P20, P21)
OP2A
(P20, P21)
Register A (4)
Register B (4)
DAC
operation
signal
Comparator
4
-c
h
a
n
el
m
u
lt
i-
p
le
x
e
d
an
a
lo
g
s
w
it
c
h
Instruction clock
A/D control circuit
Successive comparison
register (AD) (10)
A/D
interrupt
Comparator register (8)
Notes 1: This switch is turned ON only when A/D converter is operating and generates the comparison voltage.
2: Writing/reading data to the comparator register is possible only in the comparator mode (Q13=1).
The value of the comparator register is retained even when the mode is switched to the A/D conversion
mode (Q13=0) because it is separated from the successive comparison register (AD). Also, the resolution
in the comparator mode is 8 bits because the comparator register consists of 8 bits.
(Note 2)
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