參數(shù)資料
型號(hào)： M34283G2GP
元件分類(lèi)： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： 4.40 X 6.50 MM, 0.65 MM PITCH, PLASTIC, LSSOP-20
文件頁(yè)數(shù)： 15/41頁(yè)
文件大?。?/td> 441K
代理商： M34283G2GP
Rev.1.01
Mar 20, 2006
page 20 of 62
REJ03B0109-0101
4283 Group
RAM BACK-UP MODE
The 4283 Group has the RAM back-up mode.
When the POF instruction is executed, system enters the RAM
back-up state.
As oscillation stops retaining RAM, the functions and states of
reset circuit at RAM back-up mode, power dissipation can be
reduced without losing the contents of RAM. Table 7 shows the
function and states retained at RAM back-up. Figure 24 shows
the state transition.
(1) Warm start condition
When the external wakeup signal is input after the system
enters the RAM back-up state by executing the POF
instruction, the CPU starts executing the software from address
0 in page 0. In this case, the P flag is “1.”
(2) Cold start condition
The CPU starts executing the software from address 0 in page
0 when any of the following conditions is satisfied .
reset by power-on reset circuit is performed
reset by watchdog timer is performed
reset by voltage drop detection circuit is performed
In this case, the P flag is “0.”
(3) Identification of the start condition
Warm start (return from the RAM back-up state) or cold start
(return from the normal reset state) can be identified by
examining the state of the power down flag (P) with the SNZP
instruction.
Table 7 Functions and states retained at RAM back-up
RAM back-up
O
O
O
Function
Program counter (PC), registers A, B,
carry flag (CY), stack pointer (SP) (Note 2)
Contents of RAM
Port CARR
Ports D0–D7
Ports E0, E1
Port G
Timer control registers V1, V2
Pull-down control registers PU0, PU1
Logic operation selection register LO
Timer 1 function, Timer 2 function
Timer underflow flags (T1F, T2F)
Watchdog timer (WDT)
Watchdog timer flags (WDF1, WDF2)
Most significant ROM code reference enable
flag (URS)
Notes 1: “O” represents that the function can be retained, and
“” represents that the function is initialized.
Registers and flags other than the above are undefined
at RAM back-up, and set an initial value after returning.
2:The stack pointer (SP) points the level of the stack
register and is initialized to “112” at RAM back-up.
Fig. 24 State transition
Fig. 25 Set source and clear source of the P flag
Fig. 26 Start condition identified example using the SNZP
instruction
: Microcomputer starts its operation after f(XIN) is counted to16384 times.
Stabilizing time a
POF instruction
is executed
A
f(XIN) oscillation
Return input
B
(RAM back-up
mode)
f(XIN) stop
Reset
(Stabilizing time a )
S
R
Q
Power down flag P
POF instruction
Reset input
● Set source
POF instruction is executed
● Clear source
Reset input
Software start
P = “1”
?
Yes
Warm start
Cold start
No
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M34283G2GP#U1 制造商:Renesas Electronics Corporation 功能描述:MICROCONTROLLER
M34283G2-XXXGP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34286 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34286G2GP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
M34286G2GP#U0 功能描述:MCU 1.8/3.6V 2KB ROM 20-LSSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:720/4500 標(biāo)準(zhǔn)包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:4KB（4K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND
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