參數(shù)資料
型號(hào)： M34238MK-XXXGP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 4 MHz, MICROCONTROLLER, PDSO20
封裝： PLASTIC, SOP-20
文件頁(yè)數(shù)： 39/41頁(yè)
文件大?。?/td> 243K
代理商： M34238MK-XXXGP
MITSUBISHI MICROCOMPUTERS
4238 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for INFRARED REMOTE CONTROL TRANSMITTERS
6
(SP)←0
(SK0)
←000116
(PC)
←SUB1
Address
000016 NOP
000116 BM SUB1
000216 NOP
SUB1 :
NOP
.
RT
Main program
Subroutine
(PC)←(SK0)
(SP)←3
Note : After returning to the BM instruction execution address with
the RT instruction, and the BM instruction is equivalent to
the NOP instruction.
STACK REGISTERS (SKs) AND STACK
POINTER (SP)
Stack registers SKs are used to temporarily store the contents of pro-
gram counter PC just before branching until returning to the original
routine when;
performing a subroutine call, or
executing the table reference instruction (TABP p).
Stack registers (SKs) are four identical registers, so that subroutines
can be nested up to 4 levels. However, one of stack registers is used
when executing a table reference instruction. Accordingly, be careful
not to over the stack when performing these operations together. The
contents of registers SKs are destroyed when 4 levels are exceeded.
The register SK nesting level is pointed automatically by 2-bit stack
pointer (SP).
PROGRAM COUNTER (PC)
Program counter (PC) is used to specify a ROM address (page and
address). It determines a sequence in which the instructions stored
in ROM are read. It is a binary counter that increments the number of
instruction bytes each time an instruction is executed. However, the
value changes to a specified address when branch instructions, sub-
routine call instructions, or return instructions is executed.
Program counter (10 bits) consists of PCH (most significant bit to bit
7) which specifies a ROM page and PCL (bits 6 to 0) which specifies
an address within a page. After it reaches the last address (address
127) of a page, it specifies address 0 of the next page.
Make sure that the PCH does not specify a page after the last page
of the built-in ROM.
Fig. 5 Stack register (SK) structure
Fig. 6 Example of operation at subroutine call
Fig. 7 Program counter structure
Program counter (PC)
Executing BM instruction
Executing RT instruction
SK0
SK1
SK2
SK3
Stack pointer (SP) points “3” when system is
released from reset or returned from RAM back-
up state or standby state.
Stack pointer(SP) points “0” by executing the
first BM instruction,and the contents of program
counter is stored in SK0.
(SP)=0
(SP)=1
(SP)=2
(SP)=3
p1
p2
p0
a6
a5
a4
a3
a2
a1
a0
Program counter
PCH
PCL
PCH
Specifying page
PCL
Specifying address
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