![](http://datasheet.mmic.net.cn/120000/M34238MK-XXXGP_datasheet_3558621/M34238MK-XXXGP_33.png)
MITSUBISHI MICROCOMPUTERS
4238 Group
32
Program
Input command code 2516 in the first transfer. Proceed and input the
low-order 8 bits and high-order 8 bits of the address and the low-
order 8 bits and high-order 8 bits of program data, and pull the PGM
Fig.4 Timing at program verifying
Fig.3 Timing at programming
the program command is read and verified and stored into the in-
ternal data latch. When the PGM pin is released back to “H”, the
verify data that has been stored into the data latch is serially output
from the SDA pin.
Note. When outputting the verify data, the SDA pin is switched for output at the first falling of the serial clock. The SDA pin is placed in
the high-impedance state during the th(C–E) period after the last rising edge of the serial clock (at the 16th bit).
pin to “L”. When this is done, the program data is programmed to
the specified address.
Program verify
Input command code 3516 in the first transfer. Proceed and input the
low-order 8 bits and high-order 8 bits of the address and the low-
order 8 bits and high-order 8 bits of program data, and pull the PGM
pin to “L”. When this is done, the program data is programmed to
the specified address. Then, when the PGM pin is pulled to “L”
again after it is released back to “H”, the address programmed with
10 1001 00
A0
A7
Command code input
(2516)
Program address input (L) Program address input (H)
SCLK
SDA
PGM
Program
tCH
D0
D7
Program data input (L)
tCP
tWP
tCH
D8
Program data input (H)
tCH
00 00 00 0
tCH
A8 A9
0 0000 0
b0
b7
1 01 0 110 0
A0
A7
Command code input
(3516)
Program address input (L) Program address input (H)
SCLK
SDA
PGM
tCH
D0
D7
Program data input (L)
tCP
tWP
tCH
D8
Program data input (H)
tCH
00 0000 0
tCH
A8 A9
0000 0 0
tCR
tRC
SCLK
SDA
PGM
Verify
tWR
D0
D7
Verify data output (L)
D8
Verify data output (H)
tCH
0000 000
Program
b0
b7
PROM VERSION OF M34238MK-XXXGP