參數(shù)資料
型號: M32170F3VFG
廠商: Mitsubishi Electric Corporation
英文描述: 32-BIT RISC SINGLE-CHIP MICROCOMPUTER
中文描述: 32位RISC單片機
文件頁數(shù): 42/49頁
文件大小: 561K
代理商: M32170F3VFG
Mitsubishi Microcomputers
42
2001-5-14 Rev.1.0
SINGLE-CHIP 32-BIT CMOS MICROCOMPUTER
32170 Group, 32174 Group
8-level Interrupt Controller
The Interrupt Controller controls interrupt requests from
each internal peripheral I/O (31 sources) by using eight pri-
ority levels assigned to each interrupt source, including in-
terrupts disabled. In addition to these interrupts, it handles
System Break Interrupt (SBI), Reserved Instruction Excep-
tion (RIE), and Address Exception (AE) as nonmaskable in-
terrupts.
Wait Controller
The Wait Controller supports access to external devices.
For access to an external extended area of up to 1 Mbytes
(during external extended or processor mode), the Wait
Controller controls bus cycle extension by inserting one to
four wait cycles or using external WAIT signal input.
____
Real-Time Debugger
(RTD)
RTDCLK
RTDRXD
RTDTXD
RTDACK
Command
address
Data
Internal RAM
M32R
CPU
32170, 32174 Group
Data
Data
Data Bus(CPU)
Data Bus(RTD)
R/W without CPU intervention
Virtual-DPRAM
structure
Figure 29 Conceptual Diagram of the Realtime Debugger (RTD)
Realtime Debugger (RTD)
The Realtime Debugger (RTD) provides a function for ac-
cessing directly from the outside to the internal RAM. It uses
a dedicated clock-synchronized serial I/O to communicate
with the outside.
Use of the RTD communicating via dedicated serial lines al-
lows the internal RAM to be read out and rewritten without
having to halt the CPU.
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