![](http://datasheet.mmic.net.cn/90000/M306V0EEFP_datasheet_3496135/M306V0EEFP_249.png)
Rev.1.30
Oct 06, 2004
page 249 of 249
M306V0ME-XXXFP, M306V0EEFP
Protect register (PRCR) ................................ 46
Pull-up control register 0 (PUR0) ................ 222
Pull-up control register 1 (PUR1) ................ 223
Pull-up control register 2 (PUR2) ................ 223
[R]
Raster color register (RSC) ......................... 208
Reserved register i (INVCi) ........................... 97
Right border control register (RBR) ............ 207
[S]
SPRITE horizontal position register (HS) .... 203
SPRITE OSD control register (SC) ............. 202
SPRITE vertical position register i (VSi) ..... 203
System clock control register 0 (CM0) .......... 40
System clock control register 1 (CM1) .......... 40
[T]
Timer Ai interrupt control register (TAiIC)
...................................................................... 54
Timer Bi interrupt control register (TBiIC)
...................................................................... 54
Timer Ai register (TAi) ................................... 82
Timer Bi register (TBi) ................................... 92
Timer Ai mode register (TAiMR)
................................................. 81, 85, 87 to 89
Timer Bi mode register (TBiMR)
....................................................... 91, 93 to 95
Top border control register (TBR) ............... 206
Trigger select register (TRGSR) ................... 84
[U]
UART transmit/receive control register 2 (UCON)
.................................................................... 108
UART0 transmit/receive control register 0 (U0C0)
.................................................................... 105
UART0 transmit/receive control register 1 (U0C1)
.................................................................... 107
UART0 transmit/receive mode register (U0MR)
.................................................... 104, 111, 118
UART2 special mode register (U2SMR) ... 108, 128
UART2 transmit/receive mode register (U2MR)
.................................................... 104, 111, 118
UART2 transmit/receive control register 0 (U2C0)
.................................................................... 106
UART2 transmit/receive control register 1 (U2C1)
.................................................................... 107
UARTi bit rate generator (UiBRG) .............. 103
UARTi receive buffer register (UiRB) .......... 103
UARTi receive interrupt control register (SiRIC)
...................................................................... 54
UARTi transmit buffer register (UiTB) ......... 103
UARTi transmit interrupt control register (SiTIC)
...................................................................... 54
Up/down flag (UDF) ...................................... 83
[V]
VSYNC interrupt control register (VSYNCIC) ........... 54
Vertical position register i (VPi) ................... 170
[W]
Watchdog timer control register (WDC) ........ 68
Watchdog timer start register (WDTS) .......... 68