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| 型號(hào)： | M306NKME-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 37/86頁(yè) |
| 文件大?。?/td> | 724K |
| 代理商： | M306NKME-XXXGP |
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Rev.2.10
Aug 25, 2006
page 40 of 81
REJ03B0058-0210
M16C/6N Group (M16C/6NK, M16C/6NM)
5. Electric Characteristics (Normal-ver.)
Under development
This document is under development and its contents are subject to change.
Table 5.6 A/D Conversion Characteristics
(1)
10
±3
±7
±5
±7
±2
±3
±7
±5
±7
±2
±1
±3
40
VCC
VREF
Bit
LSB
k
s
V
10
3.3
2.8
0.3
2.0
0
VREF = VCC
VREF
= VCC
= 5 V
VREF
= VCC
= 3.3 V
VREF = AVCC = VCC = 3.3 V
VREF
= VCC
= 5 V
VREF
= VCC
= 3.3 V
VREF = AVCC = VCC = 3.3 V
VREF = VCC
VREF = VCC = 5 V,
φAD = 10 MHz
VREF = VCC = 5 V,
φAD = 10 MHz
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
ANEX0, ANEX1 input, AN0 to AN7 input,
AN0_0 to AN0_7 input, AN2_0 to AN2_7 input
External operation amp connection mode
Resolution
Integral
10 bits
nonlinearity
error
8 bits
Absolute
10 bits
accuracy
8 bits
Differential nonlinearity error
Offset error
Gain error
Resistor ladder
10-bit conversion time,
sample & hold available
8-bit conversion time,
sample & hold available
Sampling time
Reference voltage
Analog input voltage
–
INL
–
DNL
–
RLADDER
tCONV
tSAMP
VREF
VIA
Symbol
Parameter
Min.
Standard
Unit
Measuring Condition
Max.
Typ.
(NOTE 2)
8
1.0
3
20
1.5
Bits
%
s
k
mA
Resolution
Absolute accuracy
Setup time
Output resistance
Reference power supply input current
–
tsu
RO
IVREF
Symbol
Parameter
Min.
Standard
Unit
Measuring Condition
4
Max.
Typ.
10
NOTES:
1. Referenced to VCC = AVCC = VREF = 3.3 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2.
φAD frequency must be 10 MHz or less.
3. When sample & hold is disabled,
φAD frequency must be 250 kHz or more in addition to a limit of NOTE 2.
When sample & hold is enabled,
φAD frequency must be 1 MHz or more in addition to a limit of NOTE 2.
Table 5.7 D/A conversion Characteristics
(1)
NOTES:
1. Referenced to VCC = AVCC = VREF = 3.3 to 5.5 V, VSS = AVSS = 0 V, –40 to 85°C unless otherwise specified.
2. This applies when using one D/A converter, with the DAi register (i = 0, 1) for the unused D/A converter set to 00h.
The resistor ladder of the A/D converter is not included. Also, the IVREF will flow even if VREF is disconnected by the
ADCON1 register.
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| M306NKMG-XXXGP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCU |
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