參數(shù)資料
型號(hào)： M30625MGN-XXXGP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 14 MM, 0.65 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 14/67頁
文件大?。?/td> 2968K
代理商： M30625MGN-XXXGP
22
MITSUBISHI MICROCOMPUTERS
4551 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER for
INFRARED REMOTE CONTROL TRANSMITTER
WATCHDOG TIMER
Watchdog timer provides a method to reset the system when a
program runs wild. Watchdog timer consists of timer 2, watchdog
timer enable flag (WEF), and watchdog timer flag (WDF).
When the WRST instruction is executed after system is released
from reset, the WEF flag is set to “1.” At this time, the watchdog
timer starts operating. When the WEF flag is set to “1,” it cannot
be cleared to “0” until system reset is performed. Also, when the
WRST instruction is not executed once, watchdog timer does
not operate because the WEF flag retains “0.”
When the watchdog timer is operating, the WDF flag is set to “1”
every time the bit 12 of timer 2 is cleared from “1” to “0.” This
means that count is performed 8192 times. When the bit 12 of
timer 2 is cleared from “1” to “0” while the WDF flag is set to “1,”
the internal reset signal is generated and system reset is
performed.
The WDF flag can be cleared to “0” with the WRST instruction.
In the RAM back-up mode, through timer 2 count operation stops,
its count value is retained and the WDF flag is initialized.
In the clock operating mode, timer 2 count operation is continued
and the WDF flag is initialized.
When using the watchdog timer, execute the WRST instruction
at a certain cycle which consists of timer 2’s 8191 counts or less
to keep the microcomputer operation normal.
Fig. 20 Watchdog timer function
Fig. 21 Program example to enter the RAM back-up mode
when using the watchdog timer
The contents of the WDF flag are initialized in the RAM back-up
mode.
If the WDF flag is set to “1” at the same time that the
microcomputer enters the RAM back-up mode, system reset may
be performed.
When using the watchdog timer and the RAM back-up mode,
initialize the WDF flag with the WRST instruction just before the
microcomputer enters the RAM back-up mode (refer to Figure
21).
POF2
EPOF
; POF instruction execution enabled
(RAM back-up mode)
Oscillation stop
WRST
; Clear WDF flag
1FFF16
Value of timer 2
Internal reset
signal
WRST instruction
execution
System reset
WRST instruction
execution
WEF flag
3FFF16
0000 16
WDF flag
“1”
“0”
“1”
“0”
“H”
“L”
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M30625MGP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M30625MGP-XXXGP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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M30625MHP-XXXGP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M30625MWP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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