參數(shù)資料
型號(hào): M30624FGAFP
元件分類(lèi): 微控制器/微處理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100
封裝: 14 X 20 MM, 0.65 MM PITCH, PLASTIC, QFP-100
文件頁(yè)數(shù): 18/40頁(yè)
文件大小: 3893K
代理商: M30624FGAFP
Mitsubishi microcomputers
M16C / 62A Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Processor Mode
22
Figure 1.7.1. Processor mode register 0 and 1
Processor mode register 0 (Note 1)
Symbol
Address
When reset
PM0
000416
0016 (Note 2)
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
0 0: Single-chip mode
0 1: Memory expansion mode
1 0: Do not set
1 1: Microprocessor mode
b1 b0
PM03
PM01
PM00
Processor mode bit
PM02
R/W mode select bit
0 : RD,BHE,WR
1 : RD,WRH,WRL
Software reset bit
The device is reset when this bit is set
to “1”. The value of this bit is “0” when
read.
PM04
0 0 : Multiplexed bus is not used
0 1 : Allocated to CS2 space
1 0 : Allocated to CS1 space
1 1 : Allocated to entire space (Note4)
b5 b4
Multiplexed bus space
select bit
PM05
PM06
PM07
Port P40 to P43 function
select bit (Note 3)
0 : Address output
1 : Port function
(Address is not output)
BCLK output disable bit
0 : BCLK is output
1 : BCLK is not output
(Pin is left floating)
Note 1: Set bit 1 of the protect register (address 000A16) to “1” when writing new
values to this register.
Note 2: If the VCC voltage is applied to the CNVSS, the value of this register when
reset is 0316. (PM00 and PM01 both are set to “1”.)
Note 3: Valid in microprocessor and memory expansion modes.
Note 4: If the entire space is of multiplexed bus in memory expansion mode, choose an 8-
bit width.The processor operates using the separate bus after reset is revoked, so the entire
space multiplexed bus cannot be chosen in microprocessor mode.
P31 to P37 become a port if the entire space multiplexed bus is chosen, so only 256 bytes can
be used in each chip select.
Processor mode register 1 (Note 1)
Symbol
Address
When reset
PM1
000516
00000XX02
Bit name
Function
Bit symbol
W
R
b7
b6
b5
b4
b3
b2
b1
b0
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns
out to be indeterminate.
Reserved bit
Must always be set to “0”
0
Note 1: Set bit 1 of the protect register (address 000A16) to “1” when writing new values to this register.
Note 2: When the reset is revoked, this bit is set to “0”. To expand the internal area, set this bit to “1”
in user program. And the top of user program must be allocated to D000016 or subsequent
address.
PM17
Wait bit
0 : No wait state
1 : Wait state inserted
Reserved bit
Must always be set to “0”
0
Internal reserved area
expansion bit (Note 2)
PM13
0: The internal RAM area is 15 kbytes
or less and the internal ROM area is
192 kbytes or less
1: Expands the internal RAM area
and internal ROM area to over 15
kbytes and to over 192 kbytes
respectively. (Note 2)
00
Reserved bit
Must always be set to “0”
Reserved bit
Must always be set to “0”
Figure 1.7.1 shows the processor mode register 0 and 1.
Figure 1.7.2 shows the memory maps applicable for each of the modes.
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