參數(shù)資料
型號: M30220MA-101GP
廠商: Mitsubishi Electric Corporation
英文描述: RES-ARRAY 100-OHM 2-ELEMENT 5% 0.063W CONVEX THK-FILM SMD-0505 TR-7-PA
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 199/212頁
文件大?。?/td> 2891K
代理商: M30220MA-101GP
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Appendix Standard Serial I/O Mode 2 (Flash Memory Version)
deeopmen
Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
199
Overview of standard serial I/O mode 2 (clock asynchronized)
In standard serial I/O mode 2, software commands, addresses and data are input and output between the
MCU and peripheral units (serial programer, etc.) using 2-wire clock-asynchronized serial I/O (UART0).
Standard serial I/O mode 2 is engaged by releasing the reset with the P6
1
(CLK
0
) pin "L" level.
The TxD
0
pin is for CMOS output. Data transfer is in 8-bit units with LSB first, 1 stop bit and parity OFF.
After the reset is released, connections can be established at 9,600 bps when initial communications (Fig-
ure 1.25.16) are made with a peripheral unit. However, this requires a main clock with a minimum 2 MHz
input oscillation frequency. Baud rate can also be changed from 9,600 bps to 19,200, 38,400 or 57,600 bps
by executing software commands. However, communication errors may occur because of the oscillation
frequency of the main clock. If errors occur, change the main clock's oscillation frequency and the baud
rate.
After executing commands from a peripheral unit that requires time to erase and write data, as with erase
and program commands, allow a sufficient time interval or execute the read status command and check
how processing ended, before executing the next command.
Data and status registers in memory can be read after transmitting software commands. Status, such as
the operating state of the flash memory or whether a program or erase operation ended successfully or not,
can be checked by reading the status register. Here following are explained initial communications with
peripheral units, how frequency is identified and software commands.
Initial communications with peripheral units
After the reset is released, the bit rate generator is adjusted to 9,600 bps to match the oscillation fre-
quency of the main clock, by sending the code as prescribed by the protocol for initial communications
with peripheral units (Figure 1.25.16).
(1) Transmit "B0
16
" from a peripheral unit. If the oscillation frequency input by the main clock is 10 MHz,
the MCU with internal flash memory outputs the "B0
16
" check code. If the oscillation frequency is
anything other than 10 MHz, the MCU does not output anything.
(2) Transmit "00
16
" from a peripheral unit 16 times. (The MCU with internal flash memory sets the bit
rate generator so that "00
16
" can be successfully received.)
(3) The MCU with internal flash memory outputs the "B0
16
" check code and initial communications end
successfully *
1
. Initial communications must be transmitted at a speed of 9,600 bps and a transfer
interval of a minimum 15 ms. Also, the baud rate at the end of initial communications is 9,600 bps.
*1. If the peripheral unit cannot receive "B0
16
" successfully, change the oscillation frequency of the main clock.
Figure 1.25.16. Peripheral unit and initial communication
MCU with internal
flash memory
Peripheral unit
(1) Transfer "B0
16
"
If the oscillation frequency input
by the main clock is 10 MHz, the
MCU outputs "B0
16
". If other than
10 MHz, the MCU does not
output anything.
(2) Transfer "00
16
" 16 times
At least 15ms
transfer interval
1st
2nd
15 th
16th
(3) Transfer check code "B0
16
"
"B0
16
"
"00
16
"
"00
16
"
"00
16
"
"B0
16
"
"B0
16
"
"00
16
"
Reset
The bit rate generator setting completes (9600bps)
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