CPU Rewrite Mode (Flash Memory Version)
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Preliminary Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30220 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
171
Outline Performance (CPU Rewrite Mode)
In the CPU rewrite mode, the CPU erases, programs and reads the internal flash memory as instructed by
software commands. This rewrite control program must be transferred to internal RAM before it can be
excuted.
The CPU rewrite mode is accessed by applying 5V
±
10% to the CNV
SS
pin and writing “1” for the CPU
rewrite mode select bit (bit 1 in address 03B4
16
). Software commands are accepted once the mode is
accessed.
In the CPU rewrite mode, write to and read from software commands and data into even-numbered ad-
dress (“0” for byte address A0) in 16-bit units. Always write 8-bit software commands into even-numbered
address. Commands are ignored with odd-numbered addresses.
Use software commands to control program and erase operations. Whether a program or erase operation
has terminated normally or in error can be verified by reading the status register.
Figure 1.23.1 shows the flash memory control register.
Bit 0 is the RY/BY status flag used exclusively to read the operating status of the flash memory. During
programming and erase operations, it is “0”. Otherwise, it is “1”.
Bit 1 is the CPU rewrite mode select bit. When this bit is set to “1” and 5V
±
10% are applied to the CNV
SS
pin, the M30220 accesses the CPU rewrite mode. Software commands are accepted once the mode is
accessed. In CPU rewrite mode, the CPU becomes unable to access the internal flash memory directly.
Therefore, use the control program in RAM for write to bit 1. To set this bit to “1”, it is necessary to write “0”
and then write “1” in succession. The bit can be set to “0” by only writing a “0” .
Bit 2 is the CPU rewrite mode entry flag. This bit can be read to check whether the CPU rewrite mode has
been entered or not.
Bit 3 is the flash memory reset bit used to reset the control circuit of the internal flash memory. This bit is
used when exiting CPU rewrite mode and when flash memory access has failed. When the CPU rewrite
mode select bit is “1”, writing “1” for this bit resets the control circuit. To release the reset, it is necessary to
set this bit to “0”. If the control circuit is reset while erasing is in progress, a 5 ms wait is needed so that the
flash memory can restore normal operation. Figure 1.23.2 shows a flowchart for setting/releasing the CPU
rewrite mode.