參數(shù)資料
型號: M30218MC-XXXXFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, MROM, 10 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 95/161頁
文件大?。?/td> 2043K
代理商: M30218MC-XXXXFP
39
Under
development
Tentative Specifications REV.A
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30218 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Interrupt
Figure DD-7. Operation of saving registers
(2) Stack pointer (SP) contains odd number
[SP]
(Odd)
[SP] – 1 (Even)
[SP] – 2(Odd)
[SP] – 3 (Even)
[SP] – 4(Odd)
[SP] – 5 (Even)
Address
Sequence in which order
registers are saved
(2)
(1)
Finished saving registers
in four operations.
(3)
(4)
(1) Stack pointer (SP) contains even number
[SP]
(Even)
[SP] – 1(Odd)
[SP] – 2 (Even)
[SP] – 3(Odd)
[SP] – 4 (Even)
[SP] – 5 (Odd)
Note: [SP] denotes the initial value of the stack pointer (SP) when interrupt request is acknowledged.
After registers are saved, the SP content is [SP] minus 4.
Address
Program counter (PCM)
Stack area
Flag register (FLGL)
Program counter (PCL)
Sequence in which order
registers are saved
(2) Saved simultaneously,
all 16 bits
(1) Saved simultaneously,
all 16 bits
Finished saving registers
in two operations.
Program counter (PCM)
Stack area
Flag register (FLGL)
Program counter (PCL)
Saved simultaneously,
all 8 bits
Flag register
(FLGH)
Program
counter (PCH)
Flag register
(FLGH)
Program
counter (PCH)
The operation of saving registers carried out in the interrupt sequence is dependent on whether the
content of the stack pointer, at the time of acceptance of an interrupt request, is even or oDD- If the
content of the stack pointer (Note) is even, the content of the flag register (FLG) and the content of the
program counter (PC) are saved, 16 bits at a time. If odd, their contents are saved in two steps, 8 bits at
a time. Figure DD-7 shows the operation of the saving registers.
Note: Stack pointer indicated by U flag.
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