282
Serial I/O2
2.6.7 Precautions for Serial I/O2
(1) Clock
(a) Using internal clock
After setting the synchronous clock to an internal clock, clear the serial I/O interrupt request bit
before performing a normal serial I/O transfer or a serial I/O automatic transfer.
(b) Using external clock
After inputting “H” level to the external clock input pin, clear the serial I/O interrupt request bit before
performing a normal serial I/O transfer or a serial I/O automatic transfer.
(2) Using Serial I/O2 interrupt
Clear bit 3 of the interrupt control register to “0” by software before enabling interrupts.
(3) State of S
OUT2
pin
The S
OUT2
pin control bit of the serial I/O2 control register 2 can be used to select the S
OUT2
pin state
for non-transfer periods. Either output active or high-impedance can be selected. However, when
using an external synchronous clock, set the S
OUT2
pin control bit to “1” while the serial I/O2 clock
input is in “H” level (after transfer completion) in order to put the S
OUT2
pin in the high-impedance state.
(4) Serial I/O initialization bit
To terminate a serial transfer while transferring, set “0” to the serial I/O initialization bit of the serial
I/O2 control register 1.
When “1” is written to the serial I/O initialization bit, Serial I/O2 is enabled, however, each register is
not initialized. The value of each register needs to be set by software.
(5) Handshake signal
(a) S
BUSY2
input signal
Input “H” level to the S
BUSY2
input and “L” level to the S
BUSY2
input in the initial state. When using the
external synchronous clock, switch the input level to the S
BUSY2
input and the S
BUSY2
input while the
serial I/O2 clock input is in “H” level.
(b) S
RDY2
input/output signal
When using the internal synchronous clock, input “L” level to the S
RDY2
input and “H” level to the
S
RDY2
input in the initial state.
(6) In 8-bit serial I/O mode
When the external synchronous clock is used, the contents of the serial I/O2 register are being shifted
continually while the transfer clock is input to the serial I/O2 clock pin. At this time, the clock must be
controlled externally.