參數(shù)資料
型號: M30201
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 53/159頁
文件大?。?/td> 2319K
代理商: M30201
Unde
Timer A
deeopmen
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
53
Item
Specification
Count source
External signals input to TA0
IN
pin (effective edge can be selected by software)
TB1 overflow, TX0 overflow, TX2 overflow
Up count or down count can be selected by external signal or software
When the timer overflows or underflows, it reloads the reload register con
tents before continuing counting (Note)
1/ (FFFF
16
- n + 1) for up count
1/ (n + 1) for down count
n : Set value
Count start flag is set (= 1)
Count start flag is reset (= 0)
Interrupt request generation timing
The timer overflows or underflows
TA0
IN
pin function
Programmable I/O port or count source input
TA0
OUT
pin function
Programmable I/O port, pulse output, or up/down count select input
Read from timer
Count value can be read out by reading timer A0 register
Write to timer
When counting stopped
When a value is written to timer A0 register, it is written to both reload register and counter
When counting in progress
When a value is written to timer A0 register, it is written to only reload register
(Transferred to counter at next reload time)
Select function
Free-run count function
Even when the timer overflows or underflows, the reload register content is not reloaded to it
Pulse output function
Each time the timer overflows or underflows, the TA0
OUT
pin’s polarity isreversed
Note: This does not apply when the free-run function is selected.
Count operation
Divide ratio
Count start condition
Count stop condition
(2) Event counter mode
In this mode, the timer counts an external signal or an internal timer’s overflow. Timer A0 can count a
single-phase and a two-phase external signal. Table 1.14 lists timer specifications when counting a
single-phase external signal. Figure 1.42 shows the timer A0 mode register in event counter mode.
Table 1.15 lists timer specifications when counting a two-phase external signal. Figure 1.43 shows the
timer A0 mode register in event counter mode.
Table 1.14.
Timer specifications in event counter mode (when not processing two-phase pulse signal)
Figure 1.42. Timer A0 mode register in event counter mode
Timer A0 mode register
(When not using two-phase pulse signal processing)
b7
b6
b5
b4 b3
b2
b1
b0
0 1
0
Note 1: Set the corresponding port direction register to “1” (output mode).
Note 2: This bit is valid when only counting an external signal.
Note 3: Set the corresponding port direction register to “0” (input mode).
Note 4: When performing two-phase pulse signal processing, make sure the two-phase
pulse signal processing operation select bit (address 0384
16
) is set to “1” and
event/trigger select bits (addresses 0383
16
) to “00”.
Symbol
TA0MR
Address
0396
16
When reset
00
16
W
Operation mode select bit
0 1 : Event counter mode
b1 b0
TMOD0
TMOD1
MR0
Pulse output function
select bit
0 : Pulse is not output
(TA0
OUT
pin is a normal port pin)
1 : Pulse is output (Note 1)
(TA0
OUT
pin is a pulse output pin)
Count polarity
select bit (Note 2)
MR2
MR1
MR3
0 (Must always be fixed to “0” in event counter mode)
TCK0
Count operation type
select bit
0 : Counts external signal's falling edge
1 : Counts external signal's rising edge
Up/down switching
cause select bit
0 : Up/down flag's content
1 : TA
iOUT
pin's input signal (Note 3)
0 : Reload type
1 : Free-run type
Bit symbol
Bit name
Function
R
AA
AA
TCK1
AA
AA
AA
AA
AA
AA
Two-phase pulse operation
select bit (Note 4)
0 : Normal processing operation
1 : Multiply-by-4 processing operation
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