參數(shù)資料
型號: M30201
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
中文描述: 單片16位CMOS微機(jī)
文件頁數(shù): 44/159頁
文件大小: 2319K
代理商: M30201
Unde
Interrupts
Address Match Interrupt
deeopmen
Mitsubishi microcomputers
M30201 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
44
Address Match Interrupt
An address match interrupt is generated when the address match interrupt address register contents match
the program counter value. Two address match interrupts can be set, each of which can be enabled and
disabled by an address match interrupt enable bit. Address match interrupts are not affected by the inter-
rupt enable flag (I flag) and processor interrupt priority level (IPL).
Figure 1.32 shows the address match interrupt-related registers.
Bit name
Bit symbol
enable bit
Symbol
AIER
Address
0009
16
When reset
XXXXXX00
2
Address match interrupt enable register
Function
W
R
AAAAAAAAAAAAAA
AAAAAAAAAAAAAA
AAAAAAAAAAAAAA
AAAAAAAAAAAAAA
AAAAAAAAAAAAAA
Address match interrupt 1
AIER1
enable bit
1 : Interrupt enabled
AIER0
Symbol
RMAD0
RMAD1
Address
0012
16
to 0010
16
0016
16
to 0014
16
When reset
X00000
16
X00000
16
Nothing is assigned.
b7
b6
b5
b4
b3
b2
b1
b0
W
R
Address setting register for address match interrupt
Function
Values that can be set
Address match interrupt register i (i = 0, 1)
00000
16
to FFFFF
Nothing is assigned.
When write, set "0". When read, their contents are indeterminate.
0 : Interrupt disabled
1 : Interrupt enabled
b0 b7
b0
b3
(b19)
(b16)
b7
b0
(b15)
(b8)
b7
(b23)
AA
A
Figure 1.32. Address match interrupt-related registers
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