參數(shù)資料
型號： M2V56S40TP-8
廠商： Mitsubishi Electric Corporation
英文描述： 256M Synchronous DRAM
中文描述： 256M同步DRAM
文件頁數(shù)： 26/49頁
文件大小： 244K
代理商： M2V56S40TP-8
Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
26
SELF REFRESH
Self-refresh mode is entered by issuing a REFS command (/CS= /RAS= /CAS= L, /WE= H, CKE= L).
Once the self-refresh is initiated, it is maintained as long as CKE is kept low. During the self-refresh
mode, CKE is asynchronous and the only enabled input. All other inputs including CLK are disabled and
ignored, so that power consumption due to synchronous inputs is saved. To exit the self-refresh,
supplying stable CLK inputs, asserting DESEL or NOP command and then asserting CKE=H. After
tRFC from the 1st CLK edge following CKE=H, all banks are in idle state and a new command can be
issued, but DESEL or NOP commands must be asserted till then.
Self-Refresh
CLK
/CS
/RAS
/CAS
/WE
CKE
A0-12
BA0-1
Self Refresh Entry
Self Refresh Exit
X
00
new command
minimum tRFC
for recovery
Stable CLK
NOP
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