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參數(shù)資料
| 型號(hào)： | M2V56S20ATP-6 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 256M Synchronous DRAM |
| 中文描述： | 256M同步DRAM |
| 文件頁數(shù)： | 17/49頁 |
| 文件大?。?/td> | 244K |
| 代理商： | M2V56S20ATP-6 |
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Feb.2000
MITSUBISHI LSIs
MITSUBISHI ELECTRIC
SDRAM (Rev.1.1)
Single Data Rate
M2V56S20/ 30/ 40/ TP -6, -7, -8
256M Synchronous DRAM
17
WRITE
A WRITE command can be issued to any active bank.The start address is specified by A0-9,11(x4),
A0-9 (x8), A0-8 (x16). 1st input data is set at the same cycle as the WRITE. The consecutive data length
to be written is defined by the Burst Length. The address sequence of burst data is defined by the Burst
Type. Minimum delay time of a WRITE command after an ACT command to the same bank is tRCD.
From the last input data to the PRE command, the write recovery time (tWR) is required. When A10 is
high at a WRITE command, auto-precharge (WRITEA) is performed. Any command (READ, WRITE,
PRE, ACT, TBST) to the same bank is inhibited till the internal precharge is complete. The internal
precharge starts at tWR after the last input data cycle. The next ACT command can be issued after (BL +
tWR -1 +tRP) from the previous WRITEA. In any case, tRCD + BL + tWR -1
≥
tRASmin must be met.
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
ACT
PRE
ACT
Xa
Xa
0
Xa
00
00
tRCD
tRP
Xa
Write (BL=4)
Write
Ya
0
00
Da0
Da1
Da2
Da3
BL
tWR
CLK
Command
A0-9,11-12
A10
BA0-1
DQ
ACT
ACT
Xa
Xa
Xa
00
00
tRCD
tRP
Xa
Write with Auto-Precharge (BL=4)
Write
Ya
1
00
Da0
Da1
Da2
Da3
BL
tWR
internal precharge starts
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| M2V56S20AKT-5 | Circular Connector; No. of Contacts:13; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:10-35 RoHS Compliant: No |
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| M2V56S20ATP-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
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| M2V56S20TP-7 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM |
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