參數(shù)資料
型號: M2V56D40ATP-75AL
廠商: Mitsubishi Electric Corporation
英文描述: 256M Double Data Rate Synchronous DRAM
中文描述: 256M雙數(shù)據(jù)速率同步DRAM
文件頁數(shù): 6/40頁
文件大?。?/td> 768K
代理商: M2V56D40ATP-75AL
6
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
Type Designation Code
M 2 S 56 D 3 0 A KT –75A L
This rule is applied to only Synchronous DRAM family.
Mitsubishi Main Designation
Speed Grade10: 125MHz@CL=2.5,100MHz@CL=2.0
75:
133MHz@CL=2.5
,100MHz@CL=2.0
75A: 133MHz@CL=2.5,
133MHz@CL=2.0
Package Type TP: TSOP(II), KT: sTSOP(Small TSOP)
Process Generation
Function Reserved for Future Use
Organization 2n
2: x4, 3: x8, 4: x16
DDR Synchronous DRAM
Density 56: 256M bits
Interface V:LVTTL, S:SSTL_3, _2
Memory Style (DRAM)
BLOCK DIAGRAM
/CS /RAS /CAS /WE
UDM,
LDM
Memory
Array
Bank #0
DQ0 - 15
I/O Buffer
Memory
Array
Bank #1
Memory
Array
Bank #2
Memory
Array
Bank #3
Mode Register
Control Circuitry
Address Buffer
A0-12
BA0,1
Clock Buffer
CLK
CKE
Control Signal Buffer
QS Buffer
UDQS,LDQS
DLL
/CLK
(DDR200)
(DDR266B)
(DDR266A)
Power Grade L: Low power, Blank: standard
相關(guān)PDF資料
PDF描述
M2V56D40ATP-75L 256M Double Data Rate Synchronous DRAM
M2V56D40ATP75A 256M Double Data Rate Synchronous DRAM
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M2S56D20ATP-75A 256M Double Data Rate Synchronous DRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M2V56D40ATP-75L 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM
M2V56S20AKT 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
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M2V56S20AKT-6 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM
M2V56S20AKT-7 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Synchronous DRAM