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參數(shù)資料
| 型號(hào)： | M2V56D40AKT-75A |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 256M Double Data Rate Synchronous DRAM |
| 中文描述： | 256M雙數(shù)據(jù)速率同步DRAM |
| 文件頁(yè)數(shù)： | 13/40頁(yè) |
| 文件大?。?/td> | 768K |
| 代理商： | M2V56D40AKT-75A |
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13
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
FUNCTION TRUTH TABLE for CKE
ABBREVIATIONS:
H=High Level, L=Low Level, X=Don't Care
NOTES:
1. Low to High transition of CKE re-enable CLK and other inputs asynchronously.
A minimum setup time must be satisfied before any command except REFSX.
2. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.
3. Must be legal command.
Current State CKE n-1 CKE n
SELF-
REFRESHING
/CS
X
H
L
L
L
L
X
X
X
X
X
L
H
L
L
L
L
/RAS
X
X
H
H
H
L
X
X
X
X
X
L
X
H
H
H
L
/CAS
X
X
H
H
L
X
X
X
X
X
X
L
X
H
H
L
X
/WE
X
X
H
L
X
X
X
X
X
X
X
H
X
H
L
X
X
Address
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Action
Notes
1
1
1
1
1
1
1
H
L
L
L
L
L
L
H
L
L
H
H
H
H
H
H
H
X
H
H
H
H
H
L
X
H
L
H
L
L
L
L
L
L
INVALID
Exit Self-Refresh (Idle after tRFC)
Exit Self-Refresh (Idle after tRFC)
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Maintain Self-Refresh)
INVALID
Exit Power Down to Idle
NOP (Maintain Power Down)
Refer to Function Truth Table
Enter Self-Refresh
Enter Power Down
Enter Power Down
ILLEGAL
ILLEGAL
ILLEGAL
Refer to Current State =Power
Down
Refer to Function Truth Table
Begin CLK Suspend at Next
Cycle
Exit CLK Suspend at Next Cycle
Maintain CLK Suspend
2
2
2
2
2
2
2
L
X
X
X
X
X
X
2
H
H
X
X
X
X
X
H
L
X
X
X
X
X
3
L
L
H
L
X
X
X
X
X
X
X
X
X
X
3
ANY STATE
other than
listed above
POWER
DOWN
ALL BANKS
IDLE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M2V56D40AKT-75AL | 256M Double Data Rate Synchronous DRAM |
| M2V56D40AKT-75L | 256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-10 | 256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-10L | 256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-75 | 256M Double Data Rate Synchronous DRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2V56D40AKT-75AL | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D40AKT-75L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D40ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
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