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參數(shù)資料
| 型號： | M2V56D30AKT-75A |
| 廠商： | Mitsubishi Electric Corporation |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:5; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:10; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:10-5 RoHS Compliant: No |
| 中文描述： | 256M雙數(shù)據(jù)速率同步DRAM |
| 文件頁數(shù)： | 34/40頁 |
| 文件大?。?/td> | 768K |
| 代理商： | M2V56D30AKT-75A |
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34
MITSUBISHI ELECTRIC
Mar. '02
MITSUBISHI LSIs
DDR SDRAM
(Rev.1.44)
M2S56D20/ 30/ 40ATP -75AL, -75A, -75L, -75, -10L, -10
M2S56D20/ 30/ 40AKT -75AL, -75A, -75L, -75, -10L, -10
256M Double Data Rate Synchronous DRAM
Burst write operation can be interrupted by Write to any bank. Random column access is allowed. WRITE
to WRITE interval is 1 CLK minimum.
[Write interrupted by Write]
[Write interrupted by Read]
Burst write operation can be interrupted by read of the same or the other bank. Random column access is
allowed. Internal WRITE to READ command interval(tWTR) is 1 CLK minimum. The input data masked by
DM in the interrupted READ cycle is "don't care". tWTR is referenced from the first positive edge after the last
data input.
Write Interrupted by Read (BL=8, CL=2.5)
Command
A0-9,11
A10
BA0,1
DQ
WRITE
Yi
0
00
READ
Yj
0
00
Dai0
Dai1
Qaj0
Qaj1 Qaj2 Qaj3
QS
Qaj4 Qaj5 Qaj6
Qaj7
DM
tWTR
/CLK
CLK
Write Interrupted by Write (BL=8)
Command
A0-9,11
A10
BA0,1
WRITE
Yi
0
00
WRITE
Yk
0
10
WRITE
Yj
0
00
WRITE
Yl
0
00
DQ
Dai1
Daj1
Daj3
Dak1
Dak3
Dak5
Dal1
DQS
Dal2 Dal3
Dal5 Dal6
Dal7
Dal4
Dal0
Dak4
Dak2
Dak0
Dai0
Daj0
Daj2
/CLK
CLK
相關PDF資料 |
PDF描述 |
|---|---|
| M2V56D20TP-75 | 128 x 64 pixel format, LED Backlight available |
| M2S56D20TP-75 | 128 x 64 pixel format, LED Backlight available |
| M2V56S20TP-6 | 128 x 64 pixel format, LED Backlight available |
| M2V56S30TP-6 | 128 x 64 pixel format, LED Backlight available |
| M2V56S40TP-6 | 128 x 64 pixel format, LED Backlight available |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M2V56D30AKT-75AL | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D30AKT-75L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D30ATP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D30ATP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
| M2V56D30ATP-75 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:256M Double Data Rate Synchronous DRAM |
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