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參數(shù)資料
| 型號(hào)： | M2S12D20TP-10 |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | 128 x 64 pixel format, LED Backlight available |
| 中文描述： | 512M雙數(shù)據(jù)速率同步DRAM |
| 文件頁(yè)數(shù)： | 25/38頁(yè) |
| 文件大小： | 754K |
| 代理商： | M2S12D20TP-10 |
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MITSUBISHI
ELECTRIC
-25-
M2S12D20/ 30TP -75, -75L, -10, -10L
512M Double Data Rate Synchronous DRAM
Feb. '02
MITSUBISHI LSIs
DDR SDRAM (Rev.1.1)
MITSUBISHI ELECTRIC
tRCD
tRP
BL/2
BL/2 + tRP
READ with Auto-Precharge (BL=8, CL=2,2.5)
Command
A0-9,11-12
A10
BA0,1
DQ
ACT
Xa
Xa
00
READ
Y
1
00
DQS
/CLK
CLK
Internal Precharge Starts here
Qa0
Qa1
Qa2
Qa3
Qa4
Qa5
Qa6
Qa7
DQ
DQS
Qa0
Qa1
Qa2
Qa3
Qa4
Qa5
Qa6
Qa7
CL=2
CL=2.5
0
1
2
3
4
5
6
7
8
9
10
11
12
Operating description when new command is asserted.
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Illegal
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Illegal
WRITEA(CL=2.5)
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Illegal
Illegal
Illegal
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Illegal
WRITE(CL=2)
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PCG
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ACT
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Illegal
Illegal
Illegal
Illegal
Illegal
WRITEA(CL=2)
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Illegal
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Illegal
WRITE(CL=2.5)
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READA
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10
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9
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8
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7
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6
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5
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4
3
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READ
For Different Bank
Asserted
Command
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M2V12D20TP-10 | 128 x 64 pixel format, LED Backlight available |
| M2S12D30TP-10 | 128 x 64 pixel format, LED Backlight available |
| M2V12D30TP-10 | 128 x 64 pixel format, LED Backlight available |
| M2S12D20TP-10L | 128 x 64 pixel format, LED Backlight available |
| M2V12D20TP-10L | 128 x 64 pixel format, LED Backlight available |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M2S12D20TP-10L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM |
| M2S12D20TP-75 | 制造商:Elpida Memory Inc 功能描述:128M X 4 DDR DRAM, 0.75 ns, PDSO66 |
| M2S12D20TP-75L | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM |
| M2S12D30TP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM |
| M2S12D30TP-10 | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:512M Double Data Rate Synchronous DRAM |
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