參數(shù)資料
型號(hào)： M29W004
廠商： 意法半導(dǎo)體
英文描述： 4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
中文描述： 4兆位512KB的× 8，啟動(dòng)塊低壓?jiǎn)坞娫撮W存
文件頁(yè)數(shù)： 8/30頁(yè)
文件大?。?/td> 222K
代理商： M29W004
INSTRUCTIONS AND COMMANDS
The Command Interface latches commands writ-
ten to the memory. Instructions are made up from
one or more commands to perform Read Memory
Array, Read Electronic Signature, Read Block Pro-
tection, Program, Block Erase, Chip Erase, Erase
Suspend and Erase Resume. Commands are
made of address and data sequences. The in-
structions require from 1 to 6 cycles, the first or first
three of which are always write operations used to
initiate the instruction. They are followed by either
further write cycles to confirm the first command or
execute the command immediately. Command se-
quencing must be followed exactly. Any invalid
combination of commands will reset the device to
Read Array. The increased number of cycles has
been chosen to assure maximum data security.
Instructions are initialised by two initial Coded cy-
cles which unlock the Command Interface. In addi-
tion, for Erase, instruction confirmation is again
preceded by the two Coded cycles.
Status Register Bits
P/E.C. status is indicated during execution by Data
Polling on DQ7, detection of Toggle on DQ6 and
DQ2, or Error on DQ5 and Erase Timer DQ3 bits.
Any read attempt during Program or Erase com-
mand execution will automatically output these five
Status Register bits. The P/E.C. automatically sets
bits DQ2, DQ3, DQ5, DQ6 and DQ7. Other bits
(DQ0, DQ1 and DQ4) are reserved for future use
and should be masked. See Tables 9 and 10.
Data Polling Bit (DQ7).
When Programming op-
erations are in progress, this bit outputs the com-
plement of the bit being programmed on DQ7.
During Erase operation, it outputs a ’0’. After com-
pletion of the operation, DQ7 will output the bit last
programmed or a ’1’ after erasing. Data Polling is
valid and only effective during P/E.C. operation,
that is after the fourth W pulse for programming or
after the sixth W pulse for erase. It must be per-
formed at the address being programmed or at an
address within the block being erased. If all the
blocks selected for erasure are protected, DQ7 will
be set to ’0’ for about 100
μ
s, and then return to the
previous addressed memory data value. See Fig-
ure 11 for the Data Polling flowchart and Figure 10
for the Data Polling waveforms. DQ7 will also flag
the Erase Suspend mode by switching from ’0’ to
’1’ at the start of the Erase Suspend. In order to
monitor DQ7 in the Erase Suspend mode an ad-
dress within a block being erased must be pro-
vided. For a Read Operation in Erase Suspend
mode, DQ7 will output ’1’ if the read is attempted
on a block being erased and the data value on other
blocks. During Program operation in Erase Sus-
pend Mode, DQ7 will have the same behaviour as
in the normal program execution outside of the
suspend mode.
Toggle Bit (DQ6).
When Programming or Erasing
operations are in progress, successive attempts to
read DQ6 will output complementary data. DQ6 will
toggle following toggling of either G, or E when G
is low. The operation is completed when two suc-
cessive reads yield the same output data. The next
read will output the bit last programmed or a ’1’ after
erasing. The toggle bit DQ6 is valid only during
P/E.C. operations, that is after the fourth W pulse
for programming or after the sixth W pulse for
Erase. If the blocks selected for erasure are pro-
tected, DQ6 will toggle for about 100
μ
s and then
return back to Read. DQ6 will be set to ’1’ if a Read
operation is attempted on an Erase Suspend block.
When erase is suspended DQ6 will toggle during
programming operations in a block different to the
block in Erase Suspend. Either E or G toggling will
cause DQ6 to toggle. See Figure 12 for Toggle Bit
flowchart and Figure 13 for Toggle Bit waveforms.
Hex Code
Command
00h
Invalid/Reserved
10h
Chip Erase Confirm
20h
Reserved
30h
Block Erase Resume/Confirm
80h
Set-up Erase
90h
Read Electronic Signature/
Block Protection Status
A0h
Program
B0h
Erase Suspend
F0h
Read Array/Reset
Table 7. Commands
8/30
M29W004T, M29W004B
相關(guān)PDF資料
PDF描述
M29W004B-100N1TR Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26
M29W004B-100N5TR Circular Connector; No. of Contacts:26; Series:; Body Material:Aluminum; Connecting Termination:Solder; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle; Insert Arrangement:16-26
M29W004B-100N6TR PT02A SERIES (MS3112) GENERAL DUTY BOX MOUNT RECEPTACLES, STRAIGHT BODY STYLE, SOLDER TERMINATION, 16 SHELL SIZE, 16-8 INSERT ARRANGEMENT, RECEPTACLE GENDER, 8 CONTACTS
M29W004B-120N1TR Circular Connector; Body Material:Aluminum; Series:PT02; No. of Contacts:11; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle; Circular Contact Gender:Socket; Insert Arrangement:18-11
M29W004T-100N1TR Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT02; Number of Contacts:18; Connector Shell Size:14; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M29W004B 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
M29W004B-100N1TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
M29W004B-100N5TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
M29W004B-100N6TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
M29W004B-120N1TR 制造商:STMICROELECTRONICS 制造商全稱(chēng):STMicroelectronics 功能描述:4 Mbit 512Kb x8, Boot Block Low Voltage Single Supply Flash Memory
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