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參數(shù)資料
| 型號(hào)： | M29DW640D70ZA1F |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| 中文描述： | 64兆位（8兆x8或4Mb的x16插槽，多行，頁(yè)，引導(dǎo)塊）3V電源快閃記憶體 |
| 文件頁(yè)數(shù)： | 44/56頁(yè) |
| 文件大?。?/td> | 942K |
| 代理商： | M29DW640D70ZA1F |
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M29DW640D
44/56
APPENDIX B. COMMON FLASH INTERFACE (CFI)
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query command is issued the
addressed bank enters Read CFI Query mode and
read operations in the same bank (A21-A19) out-
put the CFI data. Tables
24
,
25
,
26
,
27
,
28
and
29
show the addresses (A-1, A0-A10) used to retrieve
the data.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
ten (see
Table 29., Security Code Area
). This area
can be accessed only in Read mode by the final
user. It is impossible to change the security num-
ber after it has been written by ST.
Table 24. Query Structure Overview
Note: Query data are always presented on the lowest order data outputs.
Table 25. CFI Query Identification String
Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’.
Address
Sub-section Name
Description
x16
x8
10h
20h
CFI Query Identification String
Command set ID and algorithm data offset
1Bh
36h
System Interface Information
Device timing & voltage information
27h
4Eh
Device Geometry Definition
Flash device layout
40h
80h
Primary Algorithm-specific Extended
Query table
Additional information specific to the Primary
Algorithm (optional)
61h
C2h
Security Code Area
64 bit unique device number
Address
Data
Description
Value
x16
x8
10h
20h
0051h
“Q”
11h
22h
0052h
Query Unique ASCII String "QRY"
"R"
12h
24h
0059h
"Y"
13h
26h
0002h
Primary Algorithm Command Set and Control Interface ID code 16 bit
ID code defining a specific algorithm
AMD
Compatible
14h
28h
0000h
15h
2Ah
0040h
Address for Primary Algorithm extended Query table (see Table
28
)
P = 40h
16h
2Ch
0000h
17h
2Eh
0000h
Alternate Vendor Command Set and Control Interface ID Code second
vendor - specified algorithm supported
NA
18h
30h
0000h
19h
32h
0000h
Address for Alternate Algorithm extended Query table
NA
1Ah
34h
0000h
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M29DW640D70ZA1E | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70ZA1 | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70N6T | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70N6F | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70N6E | 64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M29DW640D70ZA1T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70ZA6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70ZA6E | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70ZA6F | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
| M29DW640D70ZA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit (8Mb x8 or 4Mb x16, Multiple Bank, Page, Boot Block) 3V Supply Flash Memory |
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