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參數資料
| 型號： | M28F201-120N3R |
| 廠商： | 意法半導體 |
| 英文描述： | 2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| 中文描述： | 2 MB的256K × 8，芯片擦除閃存 |
| 文件頁數： | 11/21頁 |
| 文件大?。?/td> | 179K |
| 代理商： | M28F201-120N3R |
Symbol
Alt
Parameter
M28F201
Unit
-120
-150
V
CC
= 5V
±
10%
EPROM
Interface
Min
V
CC
= 5V
±
10%
EPROM
Interface
Min
Max
Max
t
VPHEL
t
VPHWL
t
WHWH3
t
EHEH3
t
AVWL
t
AVEL
t
WLAX
t
ELAX
t
ELWL
t
WLEL
t
GHWL
t
GHEL
t
DVWH
t
DVEH
t
WLWH
t
ELEH
t
WHDX
t
EHDX
t
WHWH1
t
EHEH1
t
WHWH2
t
EHEH2
t
WHEH
t
EHWH
t
WHWL
t
EHEL
t
WHGL
t
EHGL
t
AVQV
t
ELQX(1)
t
ELQV
t
GLQX(1)
t
GLQV
t
EHQZ
t
GHQZ(1)
t
AXQX
V
PP
High to Chip Enable Low
V
PP
High to Write Enable Low
Write Cycle Time(W controlled)
1
1
μ
s
μ
s
ns
1
1
t
WC
t
WC
t
AS
120
150
Write Cycle Time(E controlled)
120
150
ns
Address Valid to Write Enable Low
0
0
ns
Address Valid to Chip Enable Low
0
0
ns
t
AH
Write Enable Low to Address Transition
50
50
ns
Chip Enable Low to Address Transition
60
80
ns
t
CS
Chip Enable Low to Write Enable Low
0
0
ns
Write Enable Low to Chip Enable Low
0
0
ns
μ
s
μ
s
ns
Output Enable High to WriteEnable Low
0
0
Output Enable High to ChipEnable Low
0
0
t
DS
Input Valid to Write Enable High
50
50
Input Valid to Chip Enable High
50
50
ns
t
WP
Write Enable Low to WriteEnable High (Write Pulse)
50
60
ns
Chip Enable Low to Chip EnableHigh (Write Pulse)
70
80
ns
t
DH
Write Enable High to Input Transition
10
10
ns
Chip Enable High to Input Transition
10
10
ns
μ
s
μ
s
ms
Duration of Program Operation (W contr.)
10
10
Duration of Program Operation (E contr.)
10
10
Duration of Erase Operation (W contr.)
9.5
9.5
Duration of Erase Operation (E contr.)
9.5
9.5
ms
t
CH
Write Enable High to Chip EnableHigh
0
0
ns
Chip Enable High to Write Enable High
0
0
ns
t
WPH
Write Enable High to Write Enable Low
20
20
ns
Chip Enable High to Chip Enable Low
20
20
ns
μ
s
μ
s
ns
Write Enable High to Output EnableLow
6
6
Chip Enable High to Output Enable Low
6
6
t
ACC
t
LZ
t
CE
t
OLZ
t
OE
Addess Valid to data Output
120
150
Chip Enable Low to Output Transition
0
0
ns
Chip Enable Low to Output Valid
120
150
ns
Output Enable Low to Output Transition
0
0
ns
Output Enable Low to Output Valid
35
40
ns
(1)
Chip Enable High to Output Hi-Z
30
35
ns
t
DF
t
OH
Output Enable High to OutputHi-Z
30
35
ns
Address Transition to Output Transition
0
0
ns
Note:
1. Sampled only, not 100% tested
Table 10B. Read/Write Mode AC Characteristics,W and E Controlled
(T
A
= 0 to 70
°
C, –40 to 85
°
C or –40 to 125
°
C)
11/21
M28F201
相關PDF資料 |
PDF描述 |
|---|---|
| M28F201-120N3TR | 2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120N6R | Triple 3-Input Positive-NOR Gates 14-PDIP 0 to 70 |
| M28F201-120N6TR | 2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK1TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
| M28F201-120XK6TR | 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| M28F201-120N3TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120N6R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120N6TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK1R | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
| M28F201-120XK1TR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mb 256K x 8, Chip Erase FLASH MEMORY |
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