參數(shù)資料
型號(hào): M27V402-120N5TR
廠商: 意法半導(dǎo)體
英文描述: Switch Mode Power Supply; Output Power:100W; No. of Outputs:1; Output 1 VDC :12VDC; Output Current 1:8.5A; Power Supply Mounting:Open Frame; Approval Bodies:UL, CSA, CE; External Depth:222mm; External Width:62mm RoHS Compliant: Yes
中文描述: 4兆位的256Kb × 16低壓紫外線存儲(chǔ)器和OTP存儲(chǔ)器
文件頁(yè)數(shù): 1/15頁(yè)
文件大?。?/td> 101K
代理商: M27V402-120N5TR
1/15
May 1998
M27V402
4 Mbit (256Kb x 16) Low Voltage UV EPROM and OTP EPROM
I
LOW VOLTAGE READ OPERATION:
3V to 3.6V
I
FAST ACCESS TIME: 120ns
I
LOW POWER CONSUMPTION:
– Active Current 15mA at 5MHz
– Standby Current 20
μ
A
I
PROGRAMMING VOLTAGE: 12.75V
±
0.25V
I
PROGRAMMING TIME: 100
μ
s/byte (typical)
I
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: 8Dh
DESCRIPTION
The M27V402 is a low voltage, low power 4 Mbit
UV
erasable
and
electrically
EPROM, ideally suited for handheld and portable
microprocessor systemsrequiring large programs.
It is organized as 262,144 by 16 bits.
The M27V402 operates in the read mode with a
supply voltage as low as 3V. The decrease in op-
erating power allows either a reduction of the size
of the battery or an increase in the time between
battery recharges.
The FDIP40W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex-
pose the chipto ultraviolet light to erase the bit pat-
tern. A new pattern can then be written to the
device by following the programming procedure.
programmable
1
40
1
40
FDIP40W (F)
PDIP40 (B)
PLCC44 (K)
TSOP40 (N)
10 x 20 mm
Figure 1. Logic Diagram
AI01819
18
A0-A17
Q0-Q15
VPP
VCC
M27V402
VSS
16
G
E
Table 1. Signal Names
A0-A17
Address Inputs
Q0-Q15
Data Outputs
E
Chip Enable
G
Output Enable
V
PP
Program Supply
V
CC
Supply Voltage
V
SS
Ground
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