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參數(shù)資料
| 型號： | M25PE40VMW6TP |
| 廠商： | 意法半導體 |
| 英文描述： | 2A Standard Fixed Output LDO Regulators; Package: TO220FP-3; Constitution materials list: Packing style: Tube packaging; Package quantity: 50; Minimum package quantity: 500; |
| 中文描述： | 4兆位，低電壓，頁式可擦除的字節(jié)變性，50MHz的SPI總線，標準引腳串行閃存 |
| 文件頁數(shù)： | 27/60頁 |
| 文件大小： | 315K |
| 代理商： | M25PE40VMW6TP |
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M25PE40
Instructions
27/60
Table 8.
The protection features of the device are summarized in
Table 8
.
When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial
delivery state), it is possible to write to the Status Register provided that the Write Enable
Latch (WEL) bit has previously been set by a Write Enable (WREN) instruction, regardless
of the whether Write Protect (W) is driven High or Low.
When the Status Register Write Disable (SRWD) bit of the Status Register is set to 1, two
cases need to be considered, depending on the state of Write Protect (W):
If Write Protect (W) is driven High, it is possible to write to the Status Register provided
that the Write Enable Latch (WEL) bit has previously been set by a Write Enable
(WREN) instruction.
If Write Protect (W) is driven Low, it is
not
possible to write to the Status Register
even
if the Write Enable Latch (WEL) bit has previously been set by a Write Enable (WREN)
instruction. (Attempts to write to the Status Register are rejected, and are not accepted
for execution). As a consequence, all the data bytes in the memory area that are
software protected (SPM2) by the Block Protect (BP2, BP1, BP0) bits of the Status
Register, are also hardware protected against data modification.
●
●
Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be
entered:
by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W)
Low
or by driving Write Protect (W) Low after setting the Status Register Write Disable
(SRWD) bit.
●
●
The only way to exit the Hardware Protected Mode (HPM) once entered is to pull Write
Protect (W) High.
If Write Protect (W) is permanently tied High, the Hardware Protected Mode (HPM) can
never be activated, and only the Software Protected Mode (SPM2), using the Block Protect
(BP2, BP1, BP0) bits of the Status Register, can be used.
Protection modes (T9HX process only, see
Important note on page 6
)
W
Signal
SRWD
Bit
Mode
Write Protection of the
Status Register
Memory Content
Protected Area
(1)
1.
As defined by the values in the Block Protect (BP2, BP1, BP0) bits of the Status Register, as shown in
Table 3
.
Unprotected Area
(1)
1
0
Second
Software
Protected
(SPM2)
Status Register is Writable
(if the WREN instruction
has set the WEL bit)
The values in the SRWD,
BP2, BP1 and BP0 bits
can be changed
Protected against
Page Program,
Sector Erase and
Bulk Erase
Ready to accept
Page Program and
Sector Erase
instructions
0
0
1
1
0
1
Hardware
Protected
(HPM)
Status Register is
Hardware write protected
The values in the SRWD,
BP2, BP1 and BP0 bits
cannot be changed
Protected against
Page Program,
Sector Erase and
Bulk Erase
Ready to accept
Page Program and
Sector Erase
instructions
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M25PE40-VMW6TP | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE40-WMW6TG | 制造商:Micron Technology Inc 功能描述:4MB SERIAL FLASH - Tape and Reel |
| M25PE80 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8 Mbit, Low Voltage, Page-Erasable Serial Flash Memory with Byte-Alterability, 50MHz SPI Bus, Standard Pin-out |
| M25PE80-VMN6G | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:8-Mbit, page-erasable serial flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE80-VMN6P | 功能描述:閃存 SERIAL FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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