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參數(shù)資料
| 型號： | M24M01V-LA6T |
| 廠商： | 意法半導體 |
| 英文描述： | 1 Mbit Serial IC Bus EEPROM |
| 中文描述： | 1兆位串行IC總線的EEPROM |
| 文件頁數(shù)： | 6/19頁 |
| 文件大?。?/td> | 120K |
| 代理商： | M24M01V-LA6T |
M24M01
6/19
Figure 6. Write Mode Sequences with WC=1 (data write inhibited)
Write Operations
Following a Start condition the bus master sends
a Device Select Code with the RW bit reset to 0.
The device acknowledges this, as shown in Figure
7, and waits for two address bytes. The device re-
sponds to each address byte with an acknowledge
bit, and then waits for the data byte.
Writing to the memory may be inhibited if Write
Control (WC) is driven High. Any Write instruction
with Write Control (WC) driven High (during a pe-
riod of time from the Start condition until the end of
the two address bytes) will not modify the memory
contents, and the accompanying data bytes are
not acknowledged, as shown in Figure 6.
Each data byte in the memory has a 17-bit ad-
dress. The most significant bit, A16, is sent with
the Device Select Code, and the remaining bits,
A15-A0, in the two address bytes. The Most Sig-
nificant Byte is sent first, followed by the Least Sig-
nificant Byte. Bits A16 to A0 form the address of
the byte in memory.
When the bus master generates a Stop condition
immediately after the Ack bit (in the “10
th
bit” time
slot), either at the end of a Byte Write or a Page
Write, the internal memory Write cycle is triggered.
A Stop condition at any other time slot does not
trigger the internal Write cycle.
During the internal Write cycle, Serial Data (SDA)
is disabled internally, and the device does not re-
spond to any requests.
Byte Write
After the Device Select code and the address
bytes, the bus master sends one data byte. If the
addressed location is Write-protected, by Write
Control (WC) being driven High, the device replies
with NoAck, and the location is not modified. If, in-
stead, the addressed location is not Write-protect-
ed, the device replies with Ack. The bus master
S
S
BYTE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN
WC
S
PAGE WRITE
DEV SEL
BYTE ADDR
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01120C
PAGE WRITE
(cont'd)
WC (cont'd)
S
DATA IN N
ACK
ACK
ACK
NO ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
NO ACK
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| M24M01-V | 1 Mbit Serial IC Bus EEPROM |
| M24M01-S | 1 Mbit Serial IC Bus EEPROM |
| M24M01 | 1 Mbit Serial IC Bus EEPROM |
| M25P64-VME6 | 4 Mbit Uniform Sector, Serial Flash Memory |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M24M01-W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit serial I?2C bus EEPROM |
| M24M01-WCS3G/A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit serial I2C bus EEPROM |
| M24M01-WCS3P/A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit serial I2C bus EEPROM |
| M24M01-WCS3TG/A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit serial I2C bus EEPROM |
| M24M01-WCS3TP/A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:1 Mbit serial I?2C bus EEPROM |
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