參數(shù)資料
型號: M24M01V-LA6T
廠商: 意法半導體
英文描述: 1 Mbit Serial IC Bus EEPROM
中文描述: 1兆位串行IC總線的EEPROM
文件頁數(shù): 2/19頁
文件大?。?/td> 120K
代理商: M24M01V-LA6T
M24M01
2/19
SUMMARY DESCRIPTION
The M24M01 is a 1 Mbit (131,072 x 8) electrically
erasable programmable memory (EEPROM) ac-
cessed by an I
2
C-compatible bus.
Figure 2. Logic Diagram
Table 1. Signal Names
These devices are compatible with the I
2
C memo-
ry protocol. This is a two wire serial interface that
uses a bi-directional data bus and serial clock. The
devices carry a built-in 4-bit Device Type Identifier
code (1010) in accordance with the I
2
C bus defini-
tion.
The device behaves as a slave in the I
2
C protocol,
with all memory operations synchronized by the
serial clock. Read and Write operations are initiat-
ed by a Start condition, generated by the bus mas-
ter. The Start condition is followed by a Device
Select Code and RW bit (as described in Table 2),
terminated by an acknowledge bit.
When writing data to the memory, the device in-
serts an acknowledge bit during the 9
th
bit time,
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a Stop condition after an Ack for Write, and after a
NoAck for Read.
Figure 3. LGA Connections
Note: 1. DU = Do
n’t Use (should be left unconnected, or tied to
V
SS
)
Power On Reset: V
CC
Lock-Out Write Protect
In order to prevent data corruption and inadvertent
Write operations during Power-up, a Power On
Reset (POR) circuit is included. The internal reset
is held active until V
CC
has reached the POR
threshold value, and all operations are disabled –
the device will not respond to any command. In the
same way, when V
CC
drops from the operating
voltage, below the POR threshold value, all oper-
ations are disabled and the device will not respond
to any command. A stable and valid V
CC
must be
applied before applying any logic signal.
When the power supply is turned on, V
CC
rises
from V
SS
to V
CC
(min), passing through a value V
th
in between. The device ignores all instructions un-
til a time delay of t
PU
has elapsed after the mo-
ment that V
CC
rises above the V
th
threshold.
However, the correct operation of the device is not
guaranteed if, by this time, V
CC
is still below
V
CC
(min).No instructions should be sent until the
later of:
– t
PU
after V
CC
passed the V
th
threshold
– V
CC
passed the V
CC
(min) level
These values are specified in Table 9.
E1, E2
Chip Enable
SDA
Serial Data
SCL
Serial Clock
WC
Write Control
V
CC
Supply Voltage
V
SS
Ground
AI04048B
SDA
VCC
M24M01
WC
SCL
VSS
2
E1-E2
SDA
VSS
SCL
WC
E1
E2
DU
VCC
AI04051C
M24M01
1
2
3
4
8
7
6
5
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