參數(shù)資料
型號: M24512-WBN5G
廠商: STMICROELECTRONICS
元件分類: PROM
英文描述: 64K X 8 I2C/2-WIRE SERIAL EEPROM, PDIP8
封裝: PLASTIC, DIP-8
文件頁數(shù): 24/24頁
文件大?。?/td> 340K
代理商: M24512-WBN5G
9/24
M24512
Page Write
The Page Write mode allows up to 128 bytes to be
written in a single Write cycle, provided that they
are all located in the same ’row’ in the memory:
that is, the most significant memory address bits (b
-b7 for , and b15-b7 for M24512) are the same. If
more bytes are sent than will fit up to the end of the
row, a condition known as ‘roll-over’ occurs. This
should be avoided, as data starts to become over-
written in an implementation dependent way.
The bus master sends from 1 to 128 bytes of data,
each of which is acknowledged by the device if
Write Control (WC) is Low. If Write Control (WC) is
High, the contents of the addressed memory loca-
tion are not modified, and each data byte is fol-
lowed by a NoAck. After each byte is transferred,
the internal byte address counter (the 7 least sig-
nificant address bits only) is incremented. The
transfer is terminated by the bus master generat-
ing a Stop condition.
Figure 7. Write Mode Sequences with WC=0 (data write enabled)
STOP
START
BYTE WRITE
DEV SEL
BYTE ADDR
DATA IN
WC
START
PAGE WRITE
DEV SEL
BYTE ADDR
DATA IN 1
WC
DATA IN 2
AI01106C
PAGE WRITE
(cont'd)
WC (cont'd)
STOP
DATA IN N
ACK
R/W
ACK
R/W
ACK
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