- 您現(xiàn)在的位置：買賣IC網 > PDF目錄358970 > M24128-BRBN6T (意法半導體) 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines PDF資料下載
參數資料
| 型號： | M24128-BRBN6T |
| 廠商： | 意法半導體 |
| 元件分類： | DRAM |
| 英文描述： | 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines |
| 中文描述： | 256Kbit和128Kbit的EEPROM串行I2C總線具有三個芯片使能線 |
| 文件頁數： | 8/17頁 |
| 文件大?。?/td> | 135K |
| 代理商： | M24128-BRBN6T |
M24256, M24128
8/17
the Device Select Code, with the RW
bit set to ‘1’.
The memory acknowledges this, and outputs the
contents of the addressed byte. The master must
not
acknowledge the byte output, and terminates
the transfer with a STOP condition.
Current Address Read
The device has an internal address counter which
is incremented each time a byte is read. For the
Current Address Read mode, following a START
condition, the master sends a Device Select Code
with the RW bit set to ‘1’. The memory acknowl-
edges this, and outputs the byte addressed by the
internal address counter. The counter is then in-
minated the internal write cycle, it responds with
an Ack, indicating that the memory is ready to
receive the second part of the next instruction
(the first byte of this instruction having been sent
during Step 1).
Read Operations
Read operations are performed independently of
the state of the WC pin.
Random Address Read
A dummy write is performed to load the address
into the address counter, as shown in Figure 8.
Then,
without
sending a STOP condition, the mas-
ter sends another START condition, and repeats
Figure 8. Read Mode Sequences
Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1
st
and 4
th
bytes) must be identical.
S
DEV SEL *
BYTE ADDR
BYTE ADDR
S
DEV SEL
DATA OUT 1
AI01105C
DATA OUT N
S
S
CURRENT
ADDRESS
READ
DEV SEL
DATA OUT
RANDOM
ADDRESS
READ
S
S
DEV SEL *
DATA OUT
SEQUENTIAL
CURRENT
READ
S
DATA OUT N
S
DEV SEL *
BYTE ADDR
BYTE ADDR
SEQUENTIAL
RANDOM
READ
S
DEV SEL *
DATA OUT 1
S
ACK
R/W
NO ACK
ACK
R/W
ACK
ACK
ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
ACK
ACK
ACK
R/W
ACK
ACK
R/W
ACK
NO ACK
相關PDF資料 |
PDF描述 |
|---|---|
| M24128-B | 256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines |
| M24128 | 256/128 Kbit Serial IC Bus EEPROM Without Chip Enable Lines |
| M24128-BWMN6TG | 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines |
| M24128-BWMN6T | 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines |
| M24128-BWMN6P | 256Kbit and 128Kbit Serial I2C Bus EEPROM With Three Chip Enable Lines |
相關代理商/技術參數 |
參數描述 |
|---|---|
| M24128-BRBN6TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM |
| M24128-BRBN6TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM |
| M24128-BRCS3G | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM |
| M24128-BRCS3P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM |
| M24128-BRCS3TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM |
發(fā)布緊急采購，3分鐘左右您將得到回復。