參數(shù)資料
型號(hào)： M24128-B
廠商： 意法半導(dǎo)體
元件分類： DRAM
英文描述： 256/128 Kbit Serial I C Bus EEPROM With Three Chip Enable Lines
中文描述： 一百二十八分之二百五十六千位串行總線EEPROM，帶有集成電路芯片啟用三線
文件頁(yè)數(shù)： 2/17頁(yè)
文件大?。?/td> 135K
代理商： M24128-B
M24256, M24128
2/17
serial interface that uses a bi-directional data bus
and serial clock. The memory carries a built-in 4-
bit unique Device Type Identifier code (1010) in
accordance with the I
2
C bus definition.
The memory behaves as a slave device in the I
2
C
protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are
initiated by a START condition, generated by the
bus master. The START condition is followed by a
Device Select Code and RW bit (as described in
Table 3), terminated by an acknowledge bit.
When writing data to the memory, the memory in-
serts an acknowledge bit during the 9
th
bit time,
following the bus master’s 8-bit transmission.
When data is read by the bus master, the bus
master acknowledges the receipt of the data byte
in the same way. Data transfers are terminated by
a STOP condition after an Ack for WRITE, and af-
ter a NoAck for READ.
Power On Reset: V
CC
Lock-Out Write Protect
In order to prevent data corruption and inadvertent
write operations during power up, a Power On Re-
set (POR) circuit is included. The internal reset is
held active until the V
CC
voltage has reached the
POR threshold value, and all operations are dis-
abled – the device will not respond to any com-
mand. In the same way, when V
CC
drops from the
operating voltage, below the POR threshold value,
all operations are disabled and the device will not
respond to any command. A stable and valid V
CC
must be applied before applying any logic signal.
SIGNAL DESCRIPTION
Serial Clock (SCL)
The SCL input pin is used to strobe all data in and
out of the memory. In applications where this line
is used by slaves to synchronize the bus to a slow-
Figure 2A. DIP Connections
Note: 1. NC = Not Connected
SDA
VSS
SCL
WC
NC
NC
NC
VCC
AI01883
M24256
M24128
1
2
3
4
8
7
6
5
Figure 2B. SO Connections
Note: 1. NC = Not Connected
1
2
3
4
AI01884
8
7
6
5
SDA
VSS
SCL
WC
NC
NC
NC
VCC
M24256
M24128
Table 2. Absolute Maximum Ratings
1
Note: 1.
Except for the rating “Operating Temperature Range”, stresses above those listed in the Table “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
2. IPC/JEDEC J-STD-020A
3. JEDEC Std JESD22-A114A (C1=100 pF, R1=1500
, R2=500
)
Symbol
Parameter
Value
Unit
T
A
Ambient Operating Temperature
–40 to 125
°C
T
STG
Storage Temperature
–65 to 150
°C
T
LEAD
Lead Temperature during Soldering
PDIP: 10 seconds
SO: 20 seconds (max)
2
260
235
°C
V
IO
Input or Output range
–0.6 to 6.5
V
V
CC
Supply Voltage
–0.3 to 6.5
V
V
ESD
Electrostatic Discharge Voltage (Human Body model)
3
4000
V
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M24128-BFBN3P 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM
M24128-BFBN3TG 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit, 64 Kbit and 32 Kbit serial IC bus EEPROM
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