IGLOO Low Power Flash FPGAs
Revision 23
2-61
Table 2-92 2.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Plus Banks
Drive Strength
Speed Grade tDOUT tDP tDIN tPY tEOUT tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
4 mA
Std.
1.55
2.91 0.26 1.19
1.10
2.95 2.66 2.50 2.72
8.74
8.45
ns
6 mA
Std.
1.55
2.51 0.26 1.19
1.10
2.54 2.18 2.75 3.21
8.33
7.97
ns
8 mA
Std.
1.55
2.51 0.26 1.19
1.10
2.54 2.18 2.75 3.21
8.33
7.97
ns
12 mA
Std.
1.55
2.29 0.26 1.19
1.10
2.32 1.94 2.94 3.52
8.10
7.73
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values. Table 2-93 2.5 V LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
1.55
4.85
0.26
1.15
1.10
4.93
4.55
2.13
2.24
ns
4 mA
Std.
1.55
4.85
0.26
1.15
1.10
4.93
4.55
2.13
2.24
ns
6 mA
Std.
1.55
4.09
0.26
1.15
1.10
4.16
3.95
2.38
2.71
ns
8 mA
Std.
1.55
4.09
0.26
1.15
1.10
4.16
3.95
2.38
2.71
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values. Table 2-94 2.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Applicable to Standard Banks
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tEOUT
tZL
tZH
tLZ
tHZ
Units
2 mA
Std.
1.55
2.76
0.26
1.15
1.10
2.80
2.52
2.13
2.32
ns
4 mA
Std.
1.55
2.76
0.26
1.15
1.10
2.80
2.52
2.13
2.32
ns
6 mA
Std.
1.55
2.39
0.26
1.15
1.10
2.42
2.05
2.38
2.80
ns
8 mA
Std.
1.55
2.39
0.26
1.15
1.10
2.42
2.05
2.38
2.80
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-7 for derating values.