Fusion Family of Mixed Signal FPGAs
Revision 4
2-191
Timing Characteristics
Table 2-120 1.8 V LVCMOS Low Slew
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V,
Worst-Case VCCI = 1.7 V
Applicable to Pro I/Os
Drive
Strength
Speed
Grade tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
0.66
15.84 0.04
1.45
1.91
0.43
15.65 15.84 2.78
1.58
17.89 18.07
ns
–1
0.56
13.47 0.04
1.23
1.62
0.36
13.31 13.47 2.37
1.35
15.22 15.37
ns
–2
0.49
11.83 0.03
1.08
1.42
0.32
11.69 11.83 2.08
1.18
13.36 13.50
ns
4 mA
Std.
0.66
11.39 0.04
1.45
1.91
0.43
11.60 10.76 3.26
2.77
13.84 12.99
ns
–1
0.56
9.69
0.04
1.23
1.62
0.36
9.87
9.15
2.77
2.36
11.77 11.05
ns
–2
0.49
8.51
0.03
1.08
1.42
0.32
8.66
8.03
2.43
2.07
10.33 9.70
ns
8 mA
Std.
0.66
8.97
0.04
1.45
1.91
0.43
9.14
8.10
3.57
3.36
11.37 10.33
ns
–1
0.56
7.63
0.04
1.23
1.62
0.36
7.77
6.89
3.04
2.86
9.67
8.79
ns
–2
0.49
6.70
0.03
1.08
1.42
0.32
6.82
6.05
2.66
2.51
8.49
7.72
ns
12 mA
Std.
0.66
8.35
0.04
1.45
1.91
0.43
8.50
7.59
3.64
3.52
10.74 9.82
ns
–1
0.56
7.10
0.04
1.23
1.62
0.36
7.23
6.45
3.10
3.00
9.14
8.35
ns
–2
0.49
6.24
0.03
1.08
1.42
0.32
6.35
5.66
2.72
2.63
8.02
7.33
ns
16 mA
Std.
0.66
7.94
0.04
1.45
1.91
0.43
8.09
7.56
3.74
4.11
10.32 9.80
ns
–1
0.56
6.75
0.04
1.23
1.62
0.36
6.88
6.43
3.18
3.49
8.78
8.33
ns
–2
0.49
5.93
0.03
1.08
1.42
0.32
6.04
5.65
2.79
3.07
7.71
7.32
ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on