
Actel Fusion Mixed-Signal FPGAs
Pr el iminar y v1 .7
2-23
In Modes 1 to 3, the crystal oscillator is configured to support an external crystal or ceramic
resonator. These modes correspond to low, medium, and high gain. They differ in the crystal or
resonator frequency supported. The crystal or resonator is connected to the XTAL1 and XTAL2 pins.
Additionally, a capacitor is required on both XTAL1 and XTAL2 pins to ground (
Figure 2-16 onrange, and recommended capacitor value.
A use model supported by the Fusion device involves powering down the core while the RTC
continues to run, clocked by the crystal oscillator. When powered down, the core cannot control
crystal oscillator mode pins. Also, some designers may wish to avoid the RTC altogether. To support
both situations, the crystal oscillator can be controlled by either the RTC or the FPGA core. If the
RTC is instantiated in the design, it will by default use RTCMODE[1:0] to set the crystal oscillator
control pins (the default). If the RTC is not used in the design, the FPGA core will set the crystal
oscillator control pins with MODE[1:0].
The crystal oscillator can be disabled/enabled by RTC or FPGA upon operation requirement. When
the crystal oscillator is disabled, XTL1 and XTL2 pins can be left floating.
Crystal Oscillator Characteristics
Table 2-11 Electrical Characteristics of the Crystal Oscillator
Parameter
Description
Conditions
Min.
Typ.
Max.
Units
FXTAL
Operating Frequency
Using External Crystal
0.032
20
MHz
Using Ceramic Resonator
0.5
8
MHz
Using RC Network
0.032
4
MHz
Output Duty Cycle
50
%
Output Jitter
With 10 MHz Crystal
50
ps RMS
IDYNXTAL
Operating Current
RC
0.6
mA
0.032–0.2 MHz
0.19
mA
0.2–2.0 MHz
0.6
mA
2.0–20.0 MHz
0.6
mA
ISTBXTAL
Sleep Current
10
A
PSRRXTAL
Power
Supply
Noise
Tolerance
0.5
Vp–p
VIHXTAL
Input Logic Level HIGH
90% of VCC
V
VILXTAL
Input Logic Level LOW
10% of VCC
V